摘要
基于0.15μm GaAs pin二极管和GaAs PHEMT工艺,设计并实现了一款5~13 GHz限幅低噪声放大器(LNA)单片微波集成电路(MMIC)。该MMIC中限幅器采用三级反向并联二极管结构,优化了插入损耗和耐功率性能;LNA采用两级级联设计,利用负反馈和源电感匹配,在宽带下实现平坦的增益和较小的噪声;限幅器和LNA进行一体化设计,实现了宽带耐功率和低噪声目标。测试结果表明,在5~13 GHz内,该MMIC的小信号增益大于20 dB,噪声系数小于1.8 dB,耐功率大于46 dBm(2 ms脉宽,30%占空比),总功耗小于190 mW,芯片尺寸为3.3 mm×1.2 mm。限幅LNA MMIC芯片的尺寸较小,降低了组件成本,同时降低了组件装配难度,提高通道之间的一致性。
Based on the 0.15μm GaAs pin diode and GaAs PHEMT processes,a monolithic microwave integrated circuit(MMIC)limiter low noise amplifier(LNA)of 5-13 GHz was designed and implemented.The limier in the MMIC adopts a three-stage reverse parallel diode structure to optimize the insertion loss and power resistance performances.The LNA adopts two-level cascade design,and uses negative feedback and source inductance matching to achieve flat gain and less noise under broad band.The integrated design of the limiter and LNA achieves the target of broad band power resistance and low noise.The test results show that in 5-13 GHz,the small signal gain of the MMIC is greater than 20 dB,the noise figure is less than 1.8 dB,the power resistance is greater than 46 dBm(pulse width of 2 ms,duty cycle of 30%),the total power consumption is less than 190 mW,and the chip size is 3.3 mm×1.2 mm.The size of the limiter LNA MMIC chip is small.The cost of components and the difficulty of assembly are reduced,and the consistency between channels is improved.
作者
曾志
周鑫
Zeng Zhi;Zhou Xin(The 13^(th)Research Institute,CETC,Shijiazhuang 050051,China)
出处
《半导体技术》
CAS
北大核心
2021年第5期354-357,共4页
Semiconductor Technology
