摘要
针对射频接收机芯片中的低噪声放大器(Low-Noise Amplifier,LNA)电路在工作时要求拥有更小的噪声系数和更好的隔离度等问题,采用TSMC 0.18μm RF CMOS工艺结合共源共栅结构设计了一款低噪声放大器,在导航接收机中主要用来接收GPS L2频段信号和BDS B2频段信号。通过对器件尺寸的计算和选择,使得电路具有良好的噪声性能及线性度。利用Cadence软件中Spectre对所设计的电路进行仿真。得到仿真结果为:LNA在1.8 V电源电压下,功耗为4.28 mW,功率增益为18.51 dB,输入回波损耗为38.67 dB,输出回波损耗为19.21 dB,反向隔离度S12为-46.91 dB,噪声系数(Noise Figure,NF)为0.41 dB,输入1 dB压缩点为-11.70 dBm,输入三阶交调点为-1.50 dBm。
To suit the lower noise coefficient and better isolation requirements for low-noise amplifier(LNA)in RF receiver chips,a casecode structured LNA was designed based upon the TSMC 0.18μm RF CMOS process,which is mainly used in navigation receivers in GPS L2 and BDS B2 band signal.The noise performance and linearity were improved by optimizing the size of device.The circuit was simulated by the Spectre Module in Cadence.The experimental results show the power consumption,gain,input return loss,output return loss,reverse isolation S12,the noise figure of LNA are 4.28 mW at 1.8 V,18.51 dB,38.67 dB,19.21 dB,-46.91 dB,and 0.41 dB respectively.The input 1 dB compression point is-11.70 dBm,and the input three order intercept point is-1.50 dBm.
作者
祁赓
黄海生
李鑫
惠强
QI Geng;HUANG Haisheng;LI Xin;HUI Qiang(School of Electronic Engineering,Xi'an University of Posts and Telecommunications,Xi'an 710121,China)
出处
《电子元件与材料》
CAS
CSCD
北大核心
2019年第12期84-88,94,共6页
Electronic Components And Materials
基金
国家自然科学基金-地区科学基金项目(61661049)
西安邮电大学研究生创新基金资助项目(CXJJLI2018013)
