摘要
物理不可克隆函数(PUF)因其特有的唯一性和不可克隆性,在诸多硬件安全领域有广泛应用前景.针对仲裁器PUF和环形振荡器PUF硬件资源消耗大的弱点,在毛刺PUF设计架构基础上,充分利用FPGA中双路选择器转换时延和片(Slice)间配置开关矩阵特性,提出一种高资源利用率的毛刺PUF电路设计方法.根据可编程逻辑块(CLB)所含的不同类型Slice分别设计相应的布局布线方案,通过改变双路选择器的输入状态和调整开关矩阵中路径分配的策略控制到达双路选择器的时延差,确保产生的"毛刺"信号具有PUF特性.该方法不仅将单位CLB输出响应最高提升至2比特,还可以做到芯片Slice资源100%利用率.实验结果表明,利用Xilinx公司Virtex-5芯片实现128比特输出,在保持原有的较高唯一性(49.61%)的前提下,错误率降至2.51%;较原有毛刺PUF设计在稳定性、芯片兼容性和硬件资源使用率方面都有显著提升.
Physical unclonable function(PUF)has an extensive prospect in hardware security applicationsfor its unique and non-cloning characteristics.Motivated by the glitch PUF design architecture which usesthe delay characteristics of multiplexer and switch matrix,this paper presents a type of high efficiencyglitches PUF circuit design.By changing the input state of multiplexer and the distribution of the switchingmatrix,the switching latency of the multiplexer can be adjusted to ensure that the?glitch?signal has PUFcharacteristics.Compared to the large resource consumption of arbiter PUF and ring oscillator PUF,this designincreases a single CLB output to two bits and makes Slice resources utilization up to100%.Experimentalresults show that the error rate decreases to2.51%on the condition of maintaining the original highuniqueness(49.61%)when generating128-bit outputs with Xilinx?s Virtex-5devices.And the compatibilityand overhead are significantly improved.
作者
庞子涵
周强
高文超
郭世一
钱旭
Pang Zihan;Zhou Qiang;Gao Wenchao;Guo Shiyi;Qian Xu(School of Mechanical Electronic & Information Engineering, China University of Mining & Technology (Beijing), Beijing 100083;Department of Computer Science and Technology, Tsinghua University, Beijing 100084)
出处
《计算机辅助设计与图形学学报》
EI
CSCD
北大核心
2017年第6期1135-1144,共10页
Journal of Computer-Aided Design & Computer Graphics
基金
国家自然科学基金(61176035)
