摘要
提出了一种新的适用于低电压工作的 sem i- adiabatic逻辑电路—— Dual- Swing Charge- Recovery L ogic(DSCRL) .该电路由 CMOS- latch- type电路及负载驱动电路构成 ,对负载的驱动为 full- adiabatic过程 .DSCRL 的电源为六相双峰值脉冲电源 ,低摆幅脉冲用于驱动负载 ,高摆幅脉冲用于驱动 CMOS- latch- type电路 .降低负载上摆幅时驱动负载的 NMOS管的栅压可以保持不变 ,有效地解决了传统的 adiabatic电路在低电压工作时 charge- re-covery效率降低的问题 .文中比较了 DSCRL 电路与部分文献中的 semi- adiabatic电路的功耗 ,DSCRL
A new Dual Swing Charge Recovery Logic (DSCRL) that is suitable for the low voltage operation is presented.DSCRL is composed of a CMOS latch type circuit and output driven transistors.The operation on output loads is a full adiabatic process.Six phase dual swing power clock is used to drive DSCRL,with the low swing power clock for the loads while the high for the CMOS latch type circuit.When our cutting down the output swing,the gate voltage of output driven transistors keep relatively high to guarantee an efficient charge recovery operation.
基金
国家自然科学基金资助项目 (编号 :6 9976 0 35 )~~
