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能量回收电路的功耗优化方法 被引量:2

Power Optimization Methods of Energy Recovery Circuits
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摘要 能量回收电路的非绝热损失正比于 CLΔ V2 ,文中提出了两种方法降低 CL 和 ΔV因子 .HEERL(high efficientenergy recovery logic)电路利用自举效应减小了回收节点的残留电压 ΔV,IERL(improved energy recovery logic)电路增加了回收的通路 ,在控制回收通路的小电容节点产生了 CAΔV2的非绝热损失 ,从而使大电容输出节点电荷被充分回收 ,降低了电路的整体功耗 .降低非绝热损失两个因子 CL 和 ΔV的能量回收电路与其它能量回收电路相比 ,电路面积增加很小 (2个 NMOS管 ) ,而功耗可降低 5 0 %以上 . The non adiabatic loss in energy recovery circuit is proportional to C LΔ V 2.Two methods are presented to lower the two factors of C L and Δ V .High efficient energy recovery logic (HEERL) circuit utilizes bootstrap effect to decrease node residential voltage Δ V .Improved energy recovery logic (IERL) adds extra recovery path to improve the recovery efficiency.At the same time the control node has C AΔ V 2 non adiabatic loss,but the total circuit power is saved.Compared with other energy recovery circuits,the two circuits presented show more than 50% power saving with only small area loss.
出处 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2002年第9期996-1000,共5页 半导体学报(英文版)
基金 国家自然科学基金 (批准号 :5 9995 5 5 0 -1) 清华大学 985关键研究基金资助项目~~
关键词 功耗优化 能量回收 绝热计算 CMOS电路 IERL电路 energy recovery low power adiabatic computation CMOS circuit
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