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钟控准静态能量回收逻辑电路 被引量:3

Clocked Quasi-Static Energy Recovery Logic
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摘要 钟控准静态能量回收逻辑 (clocked quasi- static energy recovery logic,CQSERL)只在输入信号导致输出状态发生变化的情况下才对电路节点充电 (或者回收 ) ,不需要在每个功率时钟周期循环充电和回收操作 ;CQSERL是单端输入输出逻辑 ,减小了电路实现代价 .设计了 4位 QSERL 串行进位加法器 (RCA)电路 ,和相应的 CMOS电路进行了功耗比较 .功率时钟为 10 MHz时 ,CQSERL 电路功耗是对应 CMOS电路的 35 % .流片实现了一个简单结构的正弦功率时钟产生电路 。 Clocked quasi static energy recovery logic (CQSERL) circuit utilizes energy recovery theory and works like static CMOS behavior.CQSERL circuit need not to charge and recover node on each power clock cycle,this action only happens when input changes the output state;also CQSERL is single rail logic,which decreases hardware cost.QSERL circuit can works with two phase sinusoidal power clock,and circuit design is very easy established by modification of static CMOS counterpart.QSERL 4 bit carry ripple adder (RCA) is designed and compared with static CMOS counterpart.At 10MHz power clock,the power consumption of CQSERL 4 bit RCA is 35% of CMOS 4 bit RCA.A simple two phase sinusoidal power clock generator is taped out,whose phase is synchronous with system clock.
出处 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2003年第4期421-426,共6页 半导体学报(英文版)
基金 国家自然科学基金资助项目 (批准号 :5 9995 5 5 0 -1)~~
关键词 逻辑电路 准静态 能量回收 低功耗 绝热计算 CMOS电路 集成电路 quasi static energy recovery low power adiabatic computing CMOS circuit
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