摘要
文章分析了能量回收电路的功耗组成,指出非绝热损失是能量回收电路的主要功耗能量来源,提出了一种改进的能量回收逻辑电路IERL。IERL电路增加了额外的回收路径,能够显著降低电路的非绝热损失,HSPICE模拟结果表明,IERL电路具有很好的低功耗性能。同时,给出了IERL电路的复杂逻辑门设计与级联方式,用0.8μmDPDM工艺实现了2位IERL全加器电路和两相正弦功率时钟电路。
The power consumption in energy recovery circuit is analyzed in this paper Results show that the nonadiabatic loss is the main source of power consumption Based on this fact, an improved energy recovery logic (IERL) structure is proposed IERL has additional recovery paths, and by improving the recovery percentage through the additional recovery path, it can reduce the nonadiabatic loss HSPICE simulation demonstrates that IERL circuit can greatly improve the low power performance Complex gate design and cascading of IERL circuits are also considered, which are easy to implement A 2bit full adder of IERL and a twophase sinusoidal power clock generator circuit were fabricated with 08 μm DPDM CMOS technology
出处
《微电子学》
CAS
CSCD
北大核心
2003年第2期140-143,147,共5页
Microelectronics
基金
国家自然科学基金资助课题(59995550-1)
清华大学985关键研究基金资助课题。
