摘要
An asymmetry power clock,4 phase power clock supplying the power to the DSCRL(dual swing charge recovery logic) adiabatic circuit is presented.It is much simpler than the 6 phase power clock,symmetry power clock,used in the DSCRL adiabatic circuit.Although the 4 phase power clock is simpler,the DSCRL adiabatic circuit still shows good performance and high efficiency of energy transfer and recovery.This conclusion has been proved by the result of the HSPICE simulation using the 0 6μm CMOS technology.
提出了一种用于DSCRL(双摆幅电荷恢复逻辑 )绝热电路的新型四相功率时钟 ,该功率时钟采用了非对称的方法来优化其时序 ,比已提出的采用对称技术来优化时序的六相功率时钟更简洁 .这种新型的功率时钟用于DSCRL绝热电路后 ,该电路仍然保持了其能量恢复的高效性 ,同时还降低了电路设计的复杂性 ,这一结论已被文中的HSPICE模拟结果证明 .
基金
国家自然科学基金资助项目 (批准号 :6 9976 0 35 )~~
