A fully standard CMOS integrated strained Si-channel NMOSFET has been demonstrated. By adjusting the thickness of graded SiGe, modifying the channel doping concentration, changing the Ge fraction of the relaxed SiGe l...A fully standard CMOS integrated strained Si-channel NMOSFET has been demonstrated. By adjusting the thickness of graded SiGe, modifying the channel doping concentration, changing the Ge fraction of the relaxed SiGe layer and forming a p-well by multiple implantation technology, a surface strained Si-channel NMOSFET was fabricated, of which the low field mobility was enhanced by 140%, compared with the bulk-Si control device. Strained NMOSFET and PMOSFET were used to fabricate a strained CMOS inverter based on a SiGe virtual substrate. Test results indicated that the strained CMOS converter had a drain leakage current much lower than the Si devices, and the device exhibited wonderful on/off-state voltage transmission characteristics.展开更多
This paper reports the DC steady-state voltage and current transfer characteristics and power dissipation of the Complimentary Metal-Oxide-Silicon （CMOS） voltage-inverter circuit using one physical Bipolar Field-Eff...This paper reports the DC steady-state voltage and current transfer characteristics and power dissipation of the Complimentary Metal-Oxide-Silicon （CMOS） voltage-inverter circuit using one physical Bipolar Field-Effect Transistor （BiFET） of nanometer dimensions. The electrical characteristics are numerically obtained by solving the five partial dif- ferential equations for the transistor structure of two MOS-gates on the two surfaces of a thin pure silicon base layer with electron and hole contacts on both ends of the thin base. Internal and CMOS boundary conditions are used on the three potentials （electrostatic and electron and hole electrochemical potentials）. Families of curves are rapidly computed using a dual-processor personal computer running the 64-bit FORTRAN on the Windows XP operating system.展开更多
In this article,the design,fabrication and characterization of silicon carbide(SiC)complementary-metal-oxide-semiconductor(CMOS)-based integrated circuits(ICs)are presented.A metal interconnect strategy is proposed to...In this article,the design,fabrication and characterization of silicon carbide(SiC)complementary-metal-oxide-semiconductor(CMOS)-based integrated circuits(ICs)are presented.A metal interconnect strategy is proposed to fabricate the fundamental N-channel MOS(NMOS)and P-channel MOS(PMOS)devices that are required for the CMOS circuit configuration.Based on the mainstream 6-inch SiC wafer processing technology,the simultaneous fabrication of SiC CMOS ICs and power MOSFET is realized.Fundamental gates,such as inverter and NAND gates,are fabricated and tested.The measurement results show that the inverter and NAND gates function well.The calculated low-to-high delay(low-to-high output transition)and high-to-low delay(high-to-low output transition)are 49.9 and 90 ns,respectively.展开更多
基金supposed by the National Basic Research Program of Chinasupposed by the State Key Laboratory of Electronic Thin Films and Integrated Devices,UESTCthe Science and Technology on Analog Integrated Circuit Laboratory,CETC
文摘A fully standard CMOS integrated strained Si-channel NMOSFET has been demonstrated. By adjusting the thickness of graded SiGe, modifying the channel doping concentration, changing the Ge fraction of the relaxed SiGe layer and forming a p-well by multiple implantation technology, a surface strained Si-channel NMOSFET was fabricated, of which the low field mobility was enhanced by 140%, compared with the bulk-Si control device. Strained NMOSFET and PMOSFET were used to fabricate a strained CMOS inverter based on a SiGe virtual substrate. Test results indicated that the strained CMOS converter had a drain leakage current much lower than the Si devices, and the device exhibited wonderful on/off-state voltage transmission characteristics.
文摘This paper reports the DC steady-state voltage and current transfer characteristics and power dissipation of the Complimentary Metal-Oxide-Silicon （CMOS） voltage-inverter circuit using one physical Bipolar Field-Effect Transistor （BiFET） of nanometer dimensions. The electrical characteristics are numerically obtained by solving the five partial dif- ferential equations for the transistor structure of two MOS-gates on the two surfaces of a thin pure silicon base layer with electron and hole contacts on both ends of the thin base. Internal and CMOS boundary conditions are used on the three potentials （electrostatic and electron and hole electrochemical potentials）. Families of curves are rapidly computed using a dual-processor personal computer running the 64-bit FORTRAN on the Windows XP operating system.
文摘In this article,the design,fabrication and characterization of silicon carbide(SiC)complementary-metal-oxide-semiconductor(CMOS)-based integrated circuits(ICs)are presented.A metal interconnect strategy is proposed to fabricate the fundamental N-channel MOS(NMOS)and P-channel MOS(PMOS)devices that are required for the CMOS circuit configuration.Based on the mainstream 6-inch SiC wafer processing technology,the simultaneous fabrication of SiC CMOS ICs and power MOSFET is realized.Fundamental gates,such as inverter and NAND gates,are fabricated and tested.The measurement results show that the inverter and NAND gates function well.The calculated low-to-high delay(low-to-high output transition)and high-to-low delay(high-to-low output transition)are 49.9 and 90 ns,respectively.
