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低电压低功耗ECL电路设计 被引量:5

Design of Low-voltage and Low-power ECL Circuits
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摘要 首先指出了 ECL电路随着集成度和速度的提高 ,存在着功耗太大的问题 ,进而提出了采用低电压电源以降低功耗 ,为此发展了将串联开关转换成并联开关的技术 ,保证了电路能在低电压下正常工作 ,并由此实现了适合于低电压工作的 ECL电路的开关级设计。从对设计的电路进行的计算机模拟结果表明 ,采用文中提出的并联开关技术设计的电路 ,在电源电压为 -2 .5 V时 ,不仅具有正确的逻辑功能和较高的工作速度 ,且比采用-5 .0 V电源的电路节约了 80 In this paper, the problem of high power dissipation of ECL integrated circuits with the increase of the speed and density is discussed. Then, we propose to use low-voltage supply to decrease power dissipation for ECL circuits and develop a parallel switches technique instead of cascade switches to make ECL circuits operate correctly at low-voltage supply. Using this technique, ECL circuits which can operate at low-voltage supply can be designed at switch-level. The simulation results show that the designed ECL circuits with -2.5 V supply voltage using the parallel switches technique proposed not only have correct logic functions and high speed, but also decrease more than 80% power dissipation comparing with the counterparts with -5 V supply voltage.
出处 《固体电子学研究与进展》 CAS CSCD 北大核心 2003年第2期219-224,共6页 Research & Progress of SSE
基金 浙江省科技厅重点资助项目 (编号 :0 0 1110 0 2 1)
关键词 ECL 电路设计 低电压低功耗电路 开关信号理论 射极耦合逻辑电路 并联开关 非饱和型数字集成电路 串联开关 low-voltage and low-power circuits switch-signal theory ECL circuits parallel switches
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参考文献14

  • 1《中国集成电路大全》编写委员会编..中国集成电路大全 ECL集成电路[M].北京:国防工业出版社,1986:576.
  • 2程文铨,唐裕亮编著..电子计算机工程总体设计[M].北京:国防工业出版社,1984:381.
  • 3吴训威,F.Prosser.数字电路的开关级设计理论[J].中国科学(E辑),1996,26(3):257-265. 被引量:15
  • 4Nambu H, Kanetani K, Idei Y. A0.65-ns,72-kb ECL CMOS RAM Macro for a 1-MB SRAM. IEEE Journal of Solid-State Circuits, 1995 ; 30(4) :491 -499. 被引量:1
  • 5Bonges H A, Adams R D, Allen A J, et al. A 576 K 3.5-ns access BiCMOS ECL static RAM with array built-in self-test. IEEE Journal of Solid-State Circuits, 1992;27(4) :649-656. 被引量:1
  • 6Keiidhi Higeta, Masami Usami, Masayuki ohayashi,et al. A soft-error-immune 0. 9-ns 1. 15-Mb ECLCMOS SRAM with 30-ps 120 k logic gates and on-chip test circuitry. IEEE Journal of Solid-State Circuits,1996;31(10):1443-1450. 被引量:1
  • 7Elmasry M I. Digital Bipolar Integrated Circuits,New York :John Wiley & Sons, 1983. 被引量:1
  • 8Vojin G Oklobdzija. An ECL gate with improved speed and low power in a BiCMOS process. IEEE J Solid-State Circuits, 1996;31 ( 1 ) : 77 - 83. 被引量:1
  • 9Norman P Jouppi, Stenfanos Sidiropoulos, Suresh Menon. A speed, power and supply noise evaluation of ECL driver circuits. IEEE J Solid-State Circuits,1996 ;31 (1) : 38-45. 被引量:1
  • 10Tseng Yuh-Kuang, Wu Chung-Yu. A 1.5-V differential cross-coupled bootstrapped BiCMOS logic for lowvoltage applications. IEEE J Solid-State Circuits,1998:33(10):1576-1579. 被引量:1

二级参考文献9

共引文献14

同被引文献30

  • 1章专,周威.双边沿动态触发器的设计及其应用[J].浙江大学学报(理学版),2007,34(2):181-184. 被引量:2
  • 2章专,马慧舒.基于对称输入输出的三值ECL门电路设计[J].浙江大学学报(理学版),2007,34(4):418-420. 被引量:1
  • 3JOUPPI N P, SIDIROPOULOS S, MENON S. A speed and supply noise evaluation of ECL driver circuits [J]. IIEEE Journal of Solid-State Circuits, 1996,31(1):38-45. 被引量:1
  • 4ISHII K, NOSAKA H, IKA M, et al. 3.21ps ECL gate using Inp/InGaAs DHBT technology [J]. Electronics Letters,2003,39(2) :1434-1436. 被引量:1
  • 5WU Xun-wei, ZHANG Zhuan. Theory of differential current switches and logic design of ternary ECL circuits at switch level[J].Int J Electronics, 1991,71 (6) : 1023-1035. 被引量:1
  • 6刘莹,方振贤.I^2L和TTL型双边沿D触发器[J].电子科学学刊,1997,19(3):416-419. 被引量:7
  • 7KURODA T. BiCOMS-where is the beef. panel discussion [A]. Proceedings of Symposium on VLSI Circuits [C]. Kyoto: Kyoto University ,1993. 19-21. 被引量:1
  • 8ISHII K, NOSAKA H, IKA M, et al. 3. 21ps ECL gate using Inp/InGaAs DHBT technology [J]. Electronics Letters, 2003,39 (2): 1434- 1436. 被引量:1
  • 9JENS N, RICHARD N. Modified feedback ECL Gate for Gb/s applications[J]. IEEE Journal of Solid-State circuits, 1999,34(2) :205-211. 被引量:1
  • 10BANOVIC N, DOKIC B L. VF bipolar integrated circuits [J]. Telsiks' 99, 1999,13-15:396-399. 被引量:1

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