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基于FPGA精细延迟单元的TDC算法设计 被引量:4

The TDC Algorithm Design Based on Fine Delay Cell of FPGA
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摘要 根据多通道激光三维雷达系统的需要,解决每一通道的内光路触发脉冲与系统测量时钟之间延时量的技术问题,提出了一种基于FPGA精细延迟单元IODELAY的TDC算法设计,这种结构的TDC不受限于环境温度的变化,时间分辨率达到了78ps,充分满足系统测量精度的需求,在多通道激光三维雷达中有很高的应用价值。 The TDC algorithm design based on the fine delay cell of FPGA is introduced in this paper according to the requirement of the multichannel data acquisition system.It gets the delay between laser pulse and system clock.This kind of TDC is not affected by environment temperature,which has very high application value.Its time resolution is 78 ps.
出处 《光电子技术》 CAS 2015年第3期165-169,共5页 Optoelectronic Technology
基金 重大专项资助项目(AHJ2011Z001)
关键词 时间数字计数器 进位链 延迟抽头 时间分辨率 time digital counter carry chain tap delay time resolution
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