摘要
运用工作在亚阈值区的MOS管产生了一个温度系数良好的基准电压,同时在输出支路使用共源共栅结构,使该基准电压源的电源抑制比得到有效提高。基于0.18μm CMOS工艺,使用Cadence中Spectre环境进行仿真,在标准TT工艺下,该基准电压源在-40~125℃的温度范围内,基准电压的变化仅为1.627 m V,温度系数为9.56×10;/℃,电源抑制比为-72.11 d B,使用5 V电源电压供电时,此基准电压源整体只消耗了164.8 n A的电流,功耗仅为0.824μW。该基准电路不仅结构简单,还具有低功耗、高电源抑制比、无运放结构的优点。
Using the MOS tube working in the sub-threshold region, a reference voltage with good temperature coefficient is generated, and at the same time, the cascode structure is used in the output branch, so that the power supply rejection ratio of the voltage reference source is effectively improved. Based on the 0.18 μm COMS process, using the Spectre environment in Cadence for simulation, under the standard TT process, and within the temperature range of-40-125 ℃, the reference voltage changes only 1.627 m V, and the temperature coefficient is 9.56 ×10;/℃, the power supply rejection ratio is-72.11 d B, when using a 5 V power supply voltage, the voltage reference source consumes only 164.8 n A of current as a whole, and the power consumption is only 0.824 μW. The reference circuit is not only simple in structure, but also has the advantages of low power consumption, high power supply rejection ratio, and no operational amplifier structure.
作者
黄祥林
李富华
宋爱武
HUANG Xianglin;LI Fuhua;SONG Aiwu(School of Electronic andInformation Engineering,Soochow University,Suzhou 215000,China)
出处
《电子与封装》
2021年第11期36-41,共6页
Electronics & Packaging
关键词
基准电压源
亚阈值区
低功耗
高电源抑制比
无运放结构
voltagereferencesource
sub-thresholdarea
lowpowerconsumption
highpowersupplyrejectionratio
nooperationalamplifierstructure
