摘要
基于实现高精度时间测量的同时又具有大动态范围的目的,文中介绍了一款基于计数时钟在GSMC 130 nm工艺下设计的两步式TDC,电源电压为1.2 V。该设计的核心电路主要包括计数器型TDC、延迟链型TDC、高精度延迟单元、相位检测和移位寄存器。采用粗计数与细计数相结合的方法,通过外部可调电压实现高精度延迟单元的延时可调,抵消因PVT等外部因素导致的延迟单元延时的随机变化,从而有效提高TDC的精度。仿真结果表明,TDC的分辨率最高为70 ps、动态范围为640 ns、RMS约为3 ps、功耗约1.36 mW、面积为300μm×40μm。
Based on the purpose of achieving high⁃precision time measurement while having a large dynamic range,this article introduces a two⁃step TDC based on a count clock designed under the GSMC 130 nm process,with a power supply voltage of 1.2 V.The core circuit of this design mainly includes counter type TDC,delay chain type TDC,highprecision delay unit,phase detection and shift register.Using the method of combining coarse counting and fine counting,the highprecision delay unit delay adjustment is realized through an external adjustable voltage,which offsets the random change of the delay unit delay caused by external factors such as PVT,there by effectively improving the accuracy of the TDC.The simulation result shows that the TDC can have a resolution of up to 70 ps,a dynamic range of 640 ns,an RMS of about 3 ps,a power consumption of about 1.36 mW,and an area of 300μm×40μm.
作者
岳壮
刘军
孙向明
杨苹
裴骅
YUE Zhuang;LIU Jun;SUN Xiangming;YANG Ping;PEI Hua(Silicon Pixel Laboratory,Institute of Physical Science and Technology,Central China Normal University,Wuhan 430079,China)
出处
《电子设计工程》
2021年第19期7-12,共6页
Electronic Design Engineering
基金
国家自然科学基金(U1732271)
国家自然科学基金面上项目(12075100)。
