摘要
针对LVDS在长距离高速链路传输过程中出现的链路连接问题、误码问题分别从硬件设计及逻辑设计提出优化设计。在硬件设计方面LVDS发送端增加高速数字电缆驱动器,增加输出电压的摆浮,同时设计减小回波损耗;在接收端添加电缆均衡器,可补偿信号经长距离传输而产生的衰减和畸变。在逻辑设计中采用有效数与无效数相结合的数据传输方式,增强链路连接的稳定性,同时采用10B/6B编码,可实现4bit监控和1bit自纠错的能力,不仅实现了数据在双绞线的直流平衡而且具有更小的误码率,实现了数据传输的可靠性。经验证,LVDS串行数据可以实现以300Mbit/s的传输速率在100m平衡双绞线的无误码传输。
Aiming at the problem of link connection and bit error in LVDS during long-distance high-speed link transmission,optimized design is proposed from hardware design and logic design.In terms of hardware design,the LVDS transmitter adds a high-speed digital cable driver to increase the swing of the output voltage,while designing to reduce the return loss,adding a cable equalizer at the receiver to compensate for the attenuation and distortion of the signal over long distances.In the logic design,a data transmission method combining a valid number and an invalid number is used to enhance the stability of the link connection.At the same time,10B/6Bcoding is used to achieve 4bit monitoring and 1bit self-correction capabilities.The DC balance of the twisted pair and a smaller bit error rate have realized the reliability of data transmission.It has been verified that LVDS serial data can realize error-free transmission of balanced twisted pairs at a transmission rate of 300Mbit/s over 100m.
作者
朱泽珲
任勇峰
贾兴中
Zhu Zehui;Ren Yongfeng;Jia Xingzhong(State Key Laboratory of Testing Technology,North University of China,Taiyuan 030051,China)
出处
《电子测量技术》
2020年第20期150-154,共5页
Electronic Measurement Technology