摘要
为了测量多路高速数据传输的同步时延,设计了一种同步时延测量系统,采用FPGA的输入输出延迟单元(IODELAYE)和混合模式时钟管理器(MMCM)移动采样点位置,得到不同采样点位置的采样数据,通过计算机分析采样数据,找到传输不稳定的采样点位置,并计算出同步时延。IODELAYE保证了系统的高精度,通过与MMCM的结合,使系统具有宽量程的特点。测试结果表明,该系统性能稳定,测量误差小于0.2 ns,适用于多路高速数据传输场合。
In order to measure the synchronous delay of the multi-channel high-speed data transmission,a synchronous delay measurement system is designed,which moves sampling points with the Input Output Delay Element（ IODELAYE） and the Mixed-Mode Clock Manager（ MMCM） of a FPGA. Thus the sampled data at different sampling points are obtanined. Through analyzing the sampled data with a computer,the unstable sampling points will be found,which can be used to calculate the synchronization delay. Ths usage of the IODELAYE leads to the high precision and the combination of the former with the MMCM makes the system have a wide measurement range. Experiments show that the performance of the system is stable with the measurement error less than 0. 2 ns,and it＇s suitable for the multi-channel high-speed data tramitting.
出处
《电子器件》
CAS
北大核心
2015年第2期447-451,共5页
Chinese Journal of Electron Devices
基金
国家自然科学基金项目(61271291)
新世纪优秀人才支持计划项目(NCET-09-0630)
