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基于FPGA的高速数据传输方案设计与实现 被引量:11

Design and implementation of high speed data transfer based on FPGA
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摘要 为解决目前信号处理系统中数据传输的瓶颈问题,设计并实现了一种基于可编程门阵列(field programmable gate array,FPGA)的高速实时数据传输方案。该方案借助Xilinx FPGA的ChipSync技术,稳定地完成了数据的串化/解串,以及通信链路相对延迟的精确测量和调整。同时,利用提出的数据传输同步方法-系统同步和串行低压差分信号(low-voltage differential signaling,LVDS)总线技术实现板卡间大量数据的高速传送,有效地保证了多通道传输的同步性和可靠性,并大大降低了系统互联的复杂度和系统成本。 To solve the speed bottle-neck of data transfer in current signal processing system, a scheme for high speed data transfer was proposed and implemented based on field programmable gate array (FPGA). ChipSync technology in Xilinx FPGA was used for data serializing/deserializing in the scheme, and relative delay of different channels was also tested and adjusted with it. Meanwhile, a method for transferring synchronization was proposed, which along with serial LVDS bus technology guarantees the reliability and synchronization of channels and reduces system complexity and cost greatly.
出处 《重庆邮电大学学报(自然科学版)》 北大核心 2010年第2期205-208,共4页 Journal of Chongqing University of Posts and Telecommunications(Natural Science Edition)
关键词 高速数据传输 同步 低压差分信号 可编程门阵列 high speed data transfer synchronization low-voltage differential signaling (LVDS) field programmable gate array (FPGA)
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