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一种超低功耗基准电压源设计 被引量:3

Design of an Ultra-Low Power Voltage Reference
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摘要 设计了一种用于超低功耗线性稳压器电路的基准电压源,研究了NMOSFET阈值电压的温度特性。采用耗尽/增强型电压基准结构,显著降低了功耗。采用共源共栅型结构,提高了电源抑制比。设计了数模混合集成熔丝修调网络,优化了输出电压精度和温漂。电路基于0.35μm CMOS工艺实现。仿真结果表明,在2.2~5.5 V输入电压下,基准电压为814 mV,精度可达±1%。在-40℃~125℃范围内,温漂系数为2.52×10-5/℃。低频下,电源抑制比为-99.17 dB,静态电流低至27.4 nA。 A voltage reference was designed for ultra-low power linear regulator circuit. In this design, the temperature characteristics of NMOSFET threshold were studied. The power consumption was significantly reduced through enhancement/depletion mode voltage reference structure. Cascode structure was used to improve the power supply rejection ratio(PSRR). A mixed-signal fuse trimming network was designed to optimize the output voltage accuracy and temperature drift. The circuit was implemented in a 0.35 μm CMOS process. The simulation results showed that the reference voltage was 814 mV in a supply voltage range from 2.2 V to 5.5 V, and the accuracy could reach ±1%. The temperature coefficient was 2.52×10-5/℃ from-40 ℃ to 125 ℃. The PSRR was-99.17 dB at low frequency, and the quiescent current of the reference reached 27.4 nA.
作者 闫苗苗 焦立男 柳有权 YAN Miaomiao;JIAO Linan;LIU Youquan(College of Information Engineering,Chang’an University,Xi’an710064,P.R.China)
出处 《微电子学》 CAS 北大核心 2020年第2期171-175,183,共6页 Microelectronics
基金 中央高校基本科研业务费专项资金资助项目(310824173401)。
关键词 基准电压源 超低功耗 线性稳压器 电源抑制比 voltage reference ultra-low consumption LDO power supply rejection ratio
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  • 1LEUNG K N, MOK P K T. A Sub 1 V 15 ppm/~C CMOS bandgap voltage reference without requiring low threshold voltage device [ J]. IEEE Journal of Solid-State Circuits, 2002, 37 (4): 526-530. 被引量:1
  • 2ANDREOU C M, KOUDOUNAS S, GEORGIOU J. A novel wide-temperature-range, 3.9 ppm/~C CMOS bandgap reference circuit [ J ]. IEEE Journal of Solid- State Circuits, 2012, 47 (2): 574-581. 被引量:1
  • 3ACHARYA V, BANERJEE B. A supply insensitive re- sistor-less bandgap reference with buffered output [ C] // Proceedings of Circuits and Systems Workshop (DCAS). Dallas, USA, 2010: 1-4. 被引量:1
  • 4ZHOU Z K, ZHU P S, SHI Y, et al. A CMOS voltage reference based on mutual compensation of Vt. and Vtp ~ J]. IEEE Transactions on Circuits & Systems II Express Briefs, 2012, 59 (6): 341-345. 被引量:1
  • 5OSAKI Y, HIROSE T, KUROKI N, et al. 1.2-V sup- ply, 100-nW, 1.09-V bandgap and 0.7-V supply, 52.5-nW, 0.55-V subbandgap reference circuits for na-nowatt CMOS LSls [ J]. IEEE Journal of Solid-State Cir- cuits, 2013, 48 (6): 1530-1538. 被引量:1
  • 6HIROSE T, UENO K, KUROKI N, et al. A CMOS bandgap and sub-bandgap voltage reference circuits for nanowatt power LSIs [ C~ // Proceedings of Solid State Circuits Conference (A-SSCC). Beijing, China, 2010: 1-4. 被引量:1
  • 7BUCK A E, MCDONALD C L, LEWIS S H, et al. A CMOS bandgap reference without resistors [ J ]. IEEE Journal of Solid-State Circuits, 2002, 37 (1): 81-83. 被引量:1
  • 8YANG M, SUN W F, XU S, et al. A 140mV 0.8 ~A CMOS voltage reference based on sub-threshold MOSFETs [J 1. Journal of Semiconductors, 2011, 32 ( 11 ) : 127-131. 被引量:1
  • 9YAN W, LI W, LIU R. A 150-nA 13.4-ppm/~C switched-capacitor CMOS sub-bandgap voltage reference [J 1. Journal of Semiconductors, 2011, 32 (32) : 155-160. 被引量:1
  • 10UENO K, HIROSE T, ASAI T, et al. A 300 nW, 15 ppm/~C , 20 ppm/V CMOS voltage reference circuit consisting of subthreshold MOSFETs [ J]. IEEE Journal of Solid-State Circuits, 2009, 44 (7): 2047-2054. 被引量:1

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