摘要
设计了一种基于改进共源共栅电流镜的CMOS电流比较器,该比较器在1 V电压且电压误差±10%的状态下都正常工作,同时改进后的结构能够在低电压下取得较低的比较延迟。电路的输入级将输入的电流信号转化为电压信号,电平移位级的引入使该结构能够正常工作在不同的工艺角和温度下,然后通过放大器和反相器得到轨对轨输出电压。基于SMIC 0.18μm CMOS工艺进行了版图设计,并使用SPECTRE软件在不同工艺角、温度和电源电压下对电路进行了仿真。结果表明,该电路在TT工艺角下的比较精度为100 nA,平均功耗为85.53μW,延迟为2.55 ns,适合应用于高精度、低功耗电流型集成电路中。
A CMOS current comparator based on an improved cascode current mirror was designed. The comparator works normally at 1 V voltage with a voltage error of ±10%, and the improved structure can achieve lower comparative delay at low voltage. The input stage of the circuit converts the input current signal into the voltage signal. The introduction of the level shift stage enables the circuit to work normally at different process corners and temperatures. Then, the rail-to-rail output voltage was obtained through amplifiers and inverters. Finally, the layout was designed based on SMIC 0.18 μm CMOS process and the circuit was simulated by SPECTRE software at different process corners, temperatures and power supply voltages. The results show that the circuit achieves a comparative accuracy of 100 nA at TT process corner with an average power consumption of 85.53 μW and a delay of 2.55 ns. So, it is suitable for the high accuracy low power consumption current-mode integrated circuit.
作者
余飞
高雷
宋云
蔡烁
Yu Fei;Gao Lei;Song Yun;Cai Shuo(School of Computer and Communication Engineering,Changsha University of Science and Technology,Changsha 410114,China)
出处
《半导体技术》
CAS
北大核心
2019年第8期595-599,634,共6页
Semiconductor Technology
基金
国家自然科学基金资助项目(61504013,61772087,61702052)
湖南省自然科学基金资助项目(2019JJ50648)
