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一种动态零点补偿的LDO线性稳压器设计 被引量:3

Design of a Dynamic Zero Pole Compensation Low-dropout Regulator
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摘要 该文设计了一种动态零点补偿LDO。针对LDO的环路稳定性与负载电流有关的特点,给出一种动态零点补偿电路。该补偿电路位于误差放大器与缓冲器之间,能够产生一个零点,且零点的位置随着负载电流的变化而变化,从而大大降低负载电流对LDO控制环路稳定性的影响。设计采用TSMC 0.35μm标准CMOS工艺模型完成电路设计与仿真、版图绘制和流片测试,最终芯片面积为300μm×450μm。设计的LDO可在3.5~6V电源电压下工作,输出电压为3.3V。芯片测试结果表明,当负载电流为100mA时,LDO的线性调整率和负载调整率分别为3.7μV/mV和275μV/mA,整个电路的静态电流约为50μA。 In this paper,a dynamic zero compensation LDO regulator is designed.Considering the characteristic that the loop stability is relatedto load current,a dynamic zero compensation circuit which locate between error amplifier and buffer circuit,is proposed.The compensation circuit forms a dynamic zero pole which will change as the toad current changes,so that the stability of the control loop is independent of load current.Based on TSMC 0.35μm CMOS process,this work completes circuit design and simulation,physical layout,and tape-out and chip test.Finally,the chip area is 300 p m×450μm The operating voltage of chip is 3.5 - 6V,the output voltage of LDO is 33V.The chip test result shows that the proposed LDO has following characteristics:when it provides 100mA load current,the linear regulation rate is 3.7 μV/mV,the load regulation rate is 275 p V/mA,and the total quiescent current is about 50μA.
作者 刘忠超 张雨
出处 《电子质量》 2017年第12期77-79,84,共4页 Electronics Quality
关键词 动态零点补偿 误差放大器 稳定性 Dynamic Zero Pole Compensation Error Amplifier Stability
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