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一种具有部分高k介质埋层的SOI场pLDMOS器件 被引量:1

A SOI Field pLDMOS Device with Partial High k Dielectric Buried Layer
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摘要 提出了一种具有部分高k介质埋层的SOI场pLDMOS器件。将传统结构的部分埋氧层替换为介电常数更高的Si_3N_4,降低了漂移区的积累层电阻,使器件获得更低的比导通电阻,同时减弱了自热效应。与传统结构进行仿真对比,发现新结构基本保持了与传统结构相当的击穿电压,但比导通电阻降低了24%,最高温度降低了59%。 A SOI field pLDMOS device with partial high k dielectric buried layer was proposed. The high k dielectric buried layer was adopted to replace the partial buried oxide layer of the conventional pLDMOS structure, which had reduced the resistance of the accumulation layer in the drift region. Therefore, the specific on-resistance was reduced and the self-heating effect was weakened for the proposed SOI field pLDMOS. The simulation results showed that the proposed device could achieve almost similar breakdown voltage compared with the conventional SOI pLDMOS, while the specific on-resistance was reduced by 24% and the maximum body temperature was lowered by 59%.
出处 《微电子学》 CAS CSCD 北大核心 2017年第1期114-117,共4页 Microelectronics
基金 国家自然科学基金资助项目(61376080) 广东省自然科学基金资助项目(2014A030313736)
关键词 部分高k 比导通电阻 击穿电压 自热效应 场pLDMOS Partial high k Specific on-resistance Breakdown voltage Self-heating effect Field pLDMOS
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