3Robert F.Hodsonl,Kevin Somervill1,John Williams2,et al.An Architecture for Reconfigurable Computing in Space[C]//Military and Aerospace Applications of Programmable Devices and Technologies Conference (MAPLD),2005. 被引量:1
4Gary Swift,Gregory Allen,Jeffrey George,et al.Upset Susceptibility and Design Mitigation of PowerPC405 Processors Embedded in Virtex Ⅱ-Pro FPGAs[C]//Military and Aerospace Applications of Programmable Devices and Technologies Conference(MAPLD),2005. 被引量:1
5Chandru Mirchandani.Using Software Rules to Enhance FPGA Reliability[C]//Military and Aerospace Applications of Programmable Devices and Technologies Conference (MAPLD),2005. 被引量:1
6Nozomu Nishinaga,Makoto Takeuchi and Ryutaro Suzuki.Reconfigurable Communication Equipment on SmartSAT-1[C]//Military and Aerospace Applications of Programmable Devices and Technologies Conference (MAPLD),2004. 被引量:1
7Candice Yui,Gary Swift and Carl Carmichael.Single Event Upset Susceptibility Testing of the Xilinx Virtex Ⅱ FPGA[C]//Military and Aerospace Applications of Programmable Devices and Technologies Conference (MAPLD),2002. 被引量:1
8Yoshino Katsumi,Tabata Munehiro,Kaneto Keiichi,etc.Application And Characteristics Of Conducting Polymer As Radiation Shielding Material[J].Japanese Journal of Applied Physics,Part 2:Letters,1985,24(9):693-695. 被引量:1
9Fuller E,Caffrey M,Salazar A and Carmichael C,et al.Radiation testing update,SEU mitigation,and availability analysis of the Virtex FPGA for space reconfigurable computing[C]//4 th Annual Conference on Military and Aerospace Programmable Logic Devices (MAPLD),2000. 被引量:1
10Samudrala Praveen Kumar,Ramos Jeremy and Katkoori Srinivas.Selective Triple Modular Redundancy (STMR)Based Single-Event Upset (SEU) Tolerant Synthesis for FPGAs[J].IEEE Transactions on Nuclear Science,2004,51 (5):2957-2969. 被引量:1