摘要
JTAG并口下载是FPGA开发流程中重要组成部分。下载过程中状态机的切换和下载后状态信号判断是编程下载的重点。以可编程芯片为下载芯片,采用状态机的思想来实现数据的下载。通过对程序的优化和反复验证,JTAG下载是在速度和数据传输最稳定的情况下进行的,调试结果表明,JTAG下载运行可靠。
FAG parallel port download is the main composition of the FPGA development. The state machine switching in download and the state signal judging after download are important part of programming download. The programmable chip is taken as the download chip to achieve data download by means of the concept of the state - machine. After optimizing and verifying the procedure, JTAG download performs in the condition of stable speed and data transmission. The debugging result proves that the download is reliable.
出处
《微处理机》
2013年第1期13-15,共3页
Microprocessors
