摘要
在分析了DCT的原理以及采用蝶形快速算法的实现方法的基础上,提出一种可以实现不同尺寸模块调用的方法。为了达到减少硬件实现上复杂度的目的,DCT处理器采用模块化的思想,将系统划分为不同的功能模块,这样在提高硬件电路通用性的同时增强了DCT在实际应用中的灵活性。使用Verilog HDL硬件描述语言进行参数化RTL级描述,在SUSE Linux环境下的NC-Launch软件上进行仿真验证。实验验证了所设计模块功能上的正确性。在应用中,本设计能提高硬件电路的通用性和DCT的灵活性。
The paper analyzes the principle of the DCT and the fast papilionaceous algorithm, and proposes a method that can call inodules with different size. With hierarchy and modularization idea, the system is divided into some function modules that can reduce the complexity of the hardware implementation. The whole design is implemented by Verilog HDL and simulated in NC- Launch on SUSE Linux. The results indicate that the functional verification of the module is correct. This design enhances the versatility of the hardware circuit and the flexibility of DCT in the application.
出处
《微型机与应用》
2013年第3期35-37,共3页
Microcomputer & Its Applications
