摘要
模拟电压缓冲器主要用作信号监听和驱动负载。当缓冲器用来驱动负载时,为了在整个电源电压范围内尽快地驱动负载,我们希望大范围输出信号摆幅内具有高的转换速率。驱动较大负载时,在满足缓冲器限度范围内实现功耗的最小化。本文根据CMOS缓冲器的特性,提出了一种新的输出缓冲器瞬态行为的SPICE建模方法。经SPICE模型验证,该模型可有效降低系统功耗和提高系统工作性能,说明该方法的合理性和可行性。
Analog voltage buffer is mainly used for signal monitoring and driving the load. When the buffer drives load, we hope to obtain a high conversion rate within a wide range of output in order to drive the load within the entire supply voltage range as quickly as possible. When driving a larger load, we expect to minimize power consumption within buffer limitation. In this paper, we proposed a new SPICE modeling method to transient behavior of the output buffer according to the features of CMOS buffer. After the SPICE model verification, this model may reduce the system power consumption and improve the system operating performance effec- tively, which explains the rationality and the feasibility of this method.
出处
《微计算机信息》
2012年第10期154-156,共3页
Control & Automation
关键词
缓冲器
功耗
转换速率
SPICE瞬态行为模型
Key word： Buffer
power consumption
transformation speed
SPICE transient state behavior model
