摘要
为了方便软件与应用系统的开发与调试,提出一种可复用的微处理器片上调试方法.通过设计通用的调试指令集和增加调试模块,并扩展处理器内核功能,实现了断点设置与取消、内核运行的流水级精确控制、内核资源访问、任意程序段运行中特殊事件的统计等片上调试功能.该方法已在自主研发的SuperV_EF01DSP上实现.在CMOS 90nm工艺下的综合结果表明,新增的片上调试功能不影响SuperV_EF01DSP的关键路径时序,而芯片总面积仅增加了3.87%.
In this paper, a reusable on-chip debug method for mirco-processors is proposed in order to facilitate software and application system developing and debugging. By employing a debug instruction set, adding a debug module and extending the functions of the processor, the following functions are implemented： setting and cancelling breakpoints; precisely run-time control of the pipeline-stage in the core; accessing the core resources; collecting the statistic of special events between any procedures of a program, etc. This method has been implemented on the independently designed SuperV_EF01 DSP. The synthesize results under CMOS 90nm process show that the chip area overhead of SuperV_EF01 DSP with the new on-chip debug features is 3.87 %, and the critical path timing is not affected.
出处
《计算机辅助设计与图形学学报》
EI
CSCD
北大核心
2012年第10期1369-1374,共6页
Journal of Computer-Aided Design & Computer Graphics
基金
国家"核高基"科技重大专项(2009zx01034-001-002-005)
国家"九七三"重点基础研究发展计划项目(2009CB320202)
关键词
片上调试
可复用
数字信号处理器
单步
on-chip debug
reusable
digital signal processor
single-step
