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DSP+FPGA折反射全景视频处理系统中双核高速数据通信 被引量:20

High-Speed Data Communication Between DSP and FPGA in Embedded Panoramic Video Processing System
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摘要 对于嵌入式折反射全景视频处理系统,由于计算量大,一般采用多处理器协同的结构,但在该结构下多个处理器之间需要进行高速的数据通信。该文提出一种基于DSP+FPGA架构的双核高速数据通信方法,该方法通过基于地址总线的控制指令编码解析方法协同双核工作,通过逆向波形分析和基于乒乓缓存的间接DMA通信方式,实现DSP与FPGA之间的双核DMA数据通信。实验结果表明,使用上述方法实现的DSP与FPGA之间数据通信速度高达585MBps。 As the huge computational loads of panoramic video processing,most of the embedded panoramic video processing system are based on multi-cores.The problem of high-speed data communication between multi-cores must be solved.A high-speed data communication method between DSP and FPGA is proposed.In order to realize high-speed data communication,the address-bus is used to transport commands,the wave of data communication between dual-cores in DMA mode is analyzed and simulated.The experiments show that the data transmission speed is up to 588 MBps between DSP and FPGA by using those methods.
出处 《电子与信息学报》 EI CSCD 北大核心 2010年第3期649-654,共6页 Journal of Electronics & Information Technology
基金 国家自然科学基金项目(60773023 60705013) 国家863计划项目(2009AA01Z328) 中国博士后科学基金项目(20070410977) 湖南省自然科学基金项目(08JJ4018)资助课题
关键词 数据通信 双核 全景 DMA FPGA DSP Data communication Dual-cores Panoramic DMA FPGA DSP
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