摘要
文章研究基于FPGA、采用分布式算法实现FIR滤波器的原理和方法,用DSP Builder设计了一个4阶FIR滤波器,并用QuartusⅡ进行硬件仿真,仿真结果表明设计FIR滤波器的正确性。同时使用IP Core开发基于FPGA的FIR数字滤波器,利用现有的IP Core在FPGA器件上实现滤波器设计。
The theory and method to realize FIR filter using Distributed Arithmetic based on FPGA is presented. A 4-order FIR filter is designed using DSP Builder,and simulated with QuartusII. The hardware simulation result shows the designed FIR filter is correct. And the FIR filter is designed based on FPGA using the tool of IP Core.
出处
《仪表技术》
2010年第1期44-46,共3页
Instrumentation Technology
基金
攀枝花学院教育教学改革与研究资助项目(JJ0834)
