摘要
对四层叠层CSP(SCSP)芯片封装器件,采用正交试验设计与有限元分析相结合的方法研究了芯片和粘结剂——8个封装组件的厚度变化在热循环测试中对芯片上最大热应力的影响,利用极差分析找出主要影响因子并对封装结构进行优化。根据有限元模拟所得结果,确定了一组优选封装结构,其VonMises应力值明显比其它组低,提高封装器件的可靠性。
Orthogonal design of experiments and finite element analysis are adopted to investigate the chip and die attach the influence of the thickness change of eight package components in thermal cycling tests on maximum thermal stress of die for a stacked four-chip SCSP package. Identify the main influence factors using range analysis and optimize the packaging structure. According to the results of finite element simulation, determine a set of optimal package structure. Its Von Mises stress value was lower than others, obviously. And improve the reliability of packaged devices.
出处
《电子工业专用设备》
2009年第5期34-38,共5页
Equipment for Electronic Products Manufacturing
关键词
叠层封装
有限元模拟
芯片应力分析
正交试验设计
Stacked die package
Finite element simulation
Chip stress analysis
Orthogonal design of experiment
