摘要
介绍一种基于VHDL语言的全数字锁相环实现方法,并用这种方法在FPGA中实现了全数字锁相环,作为信号解调的位同步模块。
An implementation method of digital phase-locked loop based on VHDL was introduced deeply in this paper. And according to this methodwe completed the digital phase-locked loop in FPGA as our bit synchronization module of signal demodulation.
出处
《电子技术应用》
北大核心
2009年第4期63-65,共3页
Application of Electronic Technique
