摘要
设计了一种适于便携式应用的低功耗12位精度逐次逼近(SAR)式A/D转换器,最高采样频率达到140KSPS,在1.8V工作电压下的功耗仅为1mW;基于0.18μm 2P4M的CMOS工艺完成版图设计,版图面积仅为0.3mm×0.35mm。在转换精度为12位、采样速率为140KSPS时,A/D转换器的INL和DNL分别为0.7LSB和0.66LSB。
A low-power 12-bit A/D converter based on successive approximation register （SAR） architecture was presented. This A/D Converter had a maximum conversion rate of 140 KSPS and the entire ADC consumes only 1 mW of power from a 1.8 V supply. The low-power ADC was implemented in 0. 18 μm 2P4M CMOS process. The active circuit occupies a chip area of 0. 3 mm×0. 35 mm. The A/D converter had an INL and DNL of 0. 7 LSB and 0. 66 LSB, respectively, for 12-bit resolution and 140 KSPS sampling rate.
出处
《微电子学》
CAS
CSCD
北大核心
2008年第3期401-403,共3页
Microelectronics
基金
国家自然科学基金资助项目(60776016)
