摘要
利用运放共享技术,设计了一种用于10位50 MS/s流水线ADC的增益D/A转换器(MDAC)。采用SMIC 0.25μm 1P5M标准数字CMOS工艺,整个MDAC模块的版图面积为0.064 mm2。仿真结果表明,在50 MHz采样率下、输入信号为2 MHz(1.5 V振幅)正弦波时,整个电路模块的功耗为7.12 mW。
Using op-amp sharing technique, an MDAC for 10-bit 50 MS/s pipelined analog-to-digital converter （ADC） was presented. Based on SMIC＇s 0. 25μm 1P5M CMOS process, the MDAC had a layout size of 0. 064 mm^2. Simulation results showed that the circuit had a power consumption of 7. 12 mW at 50 MSPS sampling rate and 2 MHz sine wave.
出处
《微电子学》
CAS
CSCD
北大核心
2008年第2期236-240,共5页
Microelectronics
基金
国防科技重点实验室基金资助项目(51433020105DZ6802)
