摘要
有限冲击响应滤波器(FIR)被大量用于各种数字通信系统中,实现各种功能．用现场可编程门阵列(FPGA)实现各种功能的FIR滤波器,得到普遍应用．采用FIR直接型滤波器结构,每计算一个数据都要做大量的乘法和加法,计算量非常大,给工程实践的实现带来了很大困难．本文利用FPGA实现多相结构的FIR滤波器,可以大幅度的节约资源,减少运算量．
The finit impulse response filter （FIR） is used massively in each kind of digital commanication system, realizes each kind of function. The function of FIR filter with the field-programmable gate array obtains the universal application. This paper uses the FPGA to realize the poly-phase structure of the filter, which can save the resources of FPGA, rednces the calculation.
出处
《青海师专学报》
2006年第5期64-66,共3页
Journal of Qinghai Junior Teachers' College
