摘要
介绍了CORDIC(坐标旋转数字计算机)算法实现直接数字频率合成器(DDFS)中相位到正弦幅度转换的原理,提出了一种优化的基于CORDIC算法的DDFS的FPGA(现场可编程门阵列)结构,并对其中的关键部件CORDIC处理器的结构进行了较详细的描述.该结构在一定的输出精度下可以达到较好的无杂散动态范围(SFDR),同时需要的硬件资源较少,便于FPGA实现.
This paper presents a theory for performing functional mapping from phase to sine amplitude.It is used in Direct Digital Frequency Synthesizers (DDFS) based on CORDIC(Coordinate Rotation Digital Computer) algorithm.An optimized architecture of DDFS based on CORDIC is proposed,and particularly described the architecture of the key module -CORDIC processor.For a given output precision,spur-free dynamic range (SFDR) is increased and hardware resources are reduced also.In the mean time,it is easy to FPGA implementation.
出处
《厦门大学学报（自然科学版）》
CAS
CSCD
北大核心
2004年第5期636-639,共4页
Journal of Xiamen University：Natural Science
基金
福建省科技重点项目(2002H086)资助
