摘要
在现代电路设计中,一个系统往往包含了多个时钟,如何在异步时钟间传递数据成为一个很重要的问题,而使用异步FIFO可以有效地解决这个问题。异步FIFO是一种在电子系统中得到广泛应用的器件,文中介绍了一种基于FPGA的异步FIFO设计方法。使用这种方法可以设计出高速、高可靠的异步FIFO。
In modern circuit designs, a system always contains several clocks. Transmitting data among Asynchronous clocks become an important problem. But it can solve this problem by using Asynchronous FIFO. Asynchronous FIFO is a device that was widely used in electronic system. This paper introduce a method of FIFO design based on FPGA. Can design high speed and reliability asynchronous FIFO.
出处
《微计算机信息》
北大核心
2008年第2期207-208,126,共3页
Control & Automation
基金
山西省自然科学基金(20041051)资助
