This paper presents a low power design for a 384 x 288 infrared （IR） readout integrated circuit （ROIC）. For the character of IR detector （ ro ≈ 100kΩ, Iint ≈ 100nA）, a novel pixel structure called quad-share ...This paper presents a low power design for a 384 x 288 infrared （IR） readout integrated circuit （ROIC）. For the character of IR detector （ ro ≈ 100kΩ, Iint ≈ 100nA）, a novel pixel structure called quad-share buffered direct injection （QSBDI） is proposed and realized. In QSBDI,four neighbor pixels share one buffered amplifier,which creates high injection efficiency, a stable bias, good FPN performance, and low power usage. This ROIC also supports two integration modes （integration then readout and integration while readout）, two selectable gains, and four window readout modes. A test 128 × 128 ROIC is designed,fabricated,and tested. The test results show that the ROIC has good linearity. The peak to peak variance of the sub array is about 10mV. The power of pixel stage is only lmW,and the total power dissipation is 37mW at a working frequency of 4MHz.展开更多
文摘This paper presents a low power design for a 384 x 288 infrared （IR） readout integrated circuit （ROIC）. For the character of IR detector （ ro ≈ 100kΩ, Iint ≈ 100nA）, a novel pixel structure called quad-share buffered direct injection （QSBDI） is proposed and realized. In QSBDI,four neighbor pixels share one buffered amplifier,which creates high injection efficiency, a stable bias, good FPN performance, and low power usage. This ROIC also supports two integration modes （integration then readout and integration while readout）, two selectable gains, and four window readout modes. A test 128 × 128 ROIC is designed,fabricated,and tested. The test results show that the ROIC has good linearity. The peak to peak variance of the sub array is about 10mV. The power of pixel stage is only lmW,and the total power dissipation is 37mW at a working frequency of 4MHz.
