前端由不控整流器供电的感应电机变频驱动系统中,直流侧电容容值高、体积大,从而系统可靠性降低。为了提高系统功率密度和可靠性,设计了一种带小电容二极管整流器供电感应电机变频驱动系统的新型复合控制器,其结构在磁场定向电机模型控...前端由不控整流器供电的感应电机变频驱动系统中,直流侧电容容值高、体积大,从而系统可靠性降低。为了提高系统功率密度和可靠性,设计了一种带小电容二极管整流器供电感应电机变频驱动系统的新型复合控制器,其结构在磁场定向电机模型控制的基础上结合使用了电压矢量边界控制模块,同时还采用了一种无速度传感器控制的转子位置估计算法。此外,还分析了控制算法对电机参数扰动的鲁棒性,并设计了状态滤波器。搭建了1.5 k W感应电机驱动试验平台,并采用20μF容值的电容进行了试验验证,试验结果表明了新型控制器的具有较好的性能。展开更多
The diode infrared focal plane array uses the silicon diodes as a sensitive device for infrared signal measurement. By the infrared radiation, the infrared focal plane can produces small voltage signals. For the tradi...The diode infrared focal plane array uses the silicon diodes as a sensitive device for infrared signal measurement. By the infrared radiation, the infrared focal plane can produces small voltage signals. For the traditional readout circuit structures are designed to process current signals, they cannot be applied to it. In this paper, a new readout circuit for the diode un-cooled infrared focal plane array is developed. The principle of detector array signal readout and small signal amplification is given in detail. The readout circuit is designed and simulated by using the Central Semiconductor Manufacturing Corporation （CSMC） 0.5 μm complementary metal-oxide-semiconductor transistor （CMOS） technology library. Cadence Spectre simulation results show that the scheme can be applied to the CMOS readout integrated circuit （ROIC） with a larger array, such as 320×240 size array.展开更多
To miniaturize a very low level dc current amplifier and to improve its output response speed, the switched capacitor negative feedback circuit (SCNF), instead of the conventionally used high-ohmage resistor, is prese...To miniaturize a very low level dc current amplifier and to improve its output response speed, the switched capacitor negative feedback circuit (SCNF), instead of the conventionally used high-ohmage resistor, is presented in this paper. In our system, a switched capacitor filter (SCF) and an offset controller are also used to decrease vibrations and offset voltage at the output of the amplifier using SCNF. The theoretical output voltage of the very low level dc current amplifier using SCNF is obtained. The experimental results show that the unnecessary components of the amplifier’s output are much decreased, and that the response speed of the amplifier with both the SCNF and SCF is faster than that using high-ohmage resistor.展开更多
A stable LDO using VCCS （voltage control current source） is presented. The LDO is designed and implemented on GF 2P4M 0.35μm CMOS technology. Compared with a previous compensation scheme, VCCS can implement a real ...A stable LDO using VCCS （voltage control current source） is presented. The LDO is designed and implemented on GF 2P4M 0.35μm CMOS technology. Compared with a previous compensation scheme, VCCS can implement a real stable LDO with a small on-chip capacitor of 1 pF, whose stability is not affected by the variable ESR （equivalent series resistance） of the output capacitor. The unit gain frequency of the LDO loop can achieve 1.5 MHz, improving the transient response. The PSR of the LDO is larger than 45 dB within 0-40 kHz. The static current of the LDO at heavy load of 100 mA is 57 μA and the dropout voltage of the LDO is 150 mV. Experimental results show that a setting time of 10 ks is achieved, and the variation of output voltage is smaller than 35 mV for a 100 mA load step in transient response of the LDO.展开更多
This paper describes a very low level dc current amplifier using switched capacitor (SC) circuit to miniaturize and improve its output response speed, instead of the conventionally used high-oh-mage resistor. A switch...This paper describes a very low level dc current amplifier using switched capacitor (SC) circuit to miniaturize and improve its output response speed, instead of the conventionally used high-oh-mage resistor. A switched capacitor filter (SCF) and an offset controller are also used to decrease vibrations and offset voltage at the output of the amplifier. The simulation results show that the parasitic capacitances that are distributed to the input portion of the amplifier have some effect on offset voltage. From the experimental results, it is seen that the duty ratio of the clock cycle of SC circuit should be in the range from 0.05 to 0.70. It is suggested that the proposed very low level dc current amplifier using SC circuit is an effective way to obtain both a faster output response and its miniaturization.展开更多
文摘前端由不控整流器供电的感应电机变频驱动系统中,直流侧电容容值高、体积大,从而系统可靠性降低。为了提高系统功率密度和可靠性,设计了一种带小电容二极管整流器供电感应电机变频驱动系统的新型复合控制器,其结构在磁场定向电机模型控制的基础上结合使用了电压矢量边界控制模块,同时还采用了一种无速度传感器控制的转子位置估计算法。此外,还分析了控制算法对电机参数扰动的鲁棒性,并设计了状态滤波器。搭建了1.5 k W感应电机驱动试验平台,并采用20μF容值的电容进行了试验验证,试验结果表明了新型控制器的具有较好的性能。
基金supported by the Fundamental Research Funds for the Central Universities under Grant No. 2009JBM001
文摘The diode infrared focal plane array uses the silicon diodes as a sensitive device for infrared signal measurement. By the infrared radiation, the infrared focal plane can produces small voltage signals. For the traditional readout circuit structures are designed to process current signals, they cannot be applied to it. In this paper, a new readout circuit for the diode un-cooled infrared focal plane array is developed. The principle of detector array signal readout and small signal amplification is given in detail. The readout circuit is designed and simulated by using the Central Semiconductor Manufacturing Corporation （CSMC） 0.5 μm complementary metal-oxide-semiconductor transistor （CMOS） technology library. Cadence Spectre simulation results show that the scheme can be applied to the CMOS readout integrated circuit （ROIC） with a larger array, such as 320×240 size array.
文摘To miniaturize a very low level dc current amplifier and to improve its output response speed, the switched capacitor negative feedback circuit (SCNF), instead of the conventionally used high-ohmage resistor, is presented in this paper. In our system, a switched capacitor filter (SCF) and an offset controller are also used to decrease vibrations and offset voltage at the output of the amplifier using SCNF. The theoretical output voltage of the very low level dc current amplifier using SCNF is obtained. The experimental results show that the unnecessary components of the amplifier’s output are much decreased, and that the response speed of the amplifier with both the SCNF and SCF is faster than that using high-ohmage resistor.
基金supported by State Key Laboratory of ASIC and Systems of Fudan University and NSF(No.61076027)
文摘A stable LDO using VCCS （voltage control current source） is presented. The LDO is designed and implemented on GF 2P4M 0.35μm CMOS technology. Compared with a previous compensation scheme, VCCS can implement a real stable LDO with a small on-chip capacitor of 1 pF, whose stability is not affected by the variable ESR （equivalent series resistance） of the output capacitor. The unit gain frequency of the LDO loop can achieve 1.5 MHz, improving the transient response. The PSR of the LDO is larger than 45 dB within 0-40 kHz. The static current of the LDO at heavy load of 100 mA is 57 μA and the dropout voltage of the LDO is 150 mV. Experimental results show that a setting time of 10 ks is achieved, and the variation of output voltage is smaller than 35 mV for a 100 mA load step in transient response of the LDO.
文摘This paper describes a very low level dc current amplifier using switched capacitor (SC) circuit to miniaturize and improve its output response speed, instead of the conventionally used high-oh-mage resistor. A switched capacitor filter (SCF) and an offset controller are also used to decrease vibrations and offset voltage at the output of the amplifier. The simulation results show that the parasitic capacitances that are distributed to the input portion of the amplifier have some effect on offset voltage. From the experimental results, it is seen that the duty ratio of the clock cycle of SC circuit should be in the range from 0.05 to 0.70. It is suggested that the proposed very low level dc current amplifier using SC circuit is an effective way to obtain both a faster output response and its miniaturization.
