We present the design consideration and fabrication of 4H-SiC trenched-and-implanted vertical junction field-effect transistors （TI-VJFETs）. Different design factors, including channel width, channel doping, and mes...We present the design consideration and fabrication of 4H-SiC trenched-and-implanted vertical junction field-effect transistors （TI-VJFETs）. Different design factors, including channel width, channel doping, and mesa height, are con- sidered and evaluated by numerical simulations. Based on the simulation result, normally-on and normally-off devices are fabricated. The fabricated device has a 12 μm thick drift layer with 8 × 10^15 cm^-3 N-type doping and 2.6 μm channel length. The normally-on device shows a 1.2 kV blocking capability with a minimum on-state resistance of 2.33 mΩ.cm2, while the normally-off device shows an on-state resistance of 3.85 mΩ.cm2. Both the on-state and the blocking performances of the device are close to the state-of-the-art values in this voltage range.展开更多
Traditional digital processing approaches are based on semiconductor transistors, which suffer from high power consumption, aggravating with technology node scaling. To solve definitively this problem, a number of eme...Traditional digital processing approaches are based on semiconductor transistors, which suffer from high power consumption, aggravating with technology node scaling. To solve definitively this problem, a number of emerging non-volatile nanodevices are under intense investigations. Meanwhile, novel computing circuits are invented to dig the full potential of the nanodevices. The combination of non-volatile nanodevices with suitable computing paradigms have many merits compared with the complementary metal-oxide-semiconductor transistor （CMOS） technology based structures, such as zero standby power, ultra-high density, non-volatility, and acceptable access speed. In this paper, we overview and compare the computing paradigms based on the emerging nanodevices towards ultra-low dissipation.展开更多
Flexible logic circuits and memory with ultra-low static power consumption are in great demand for battery-powered flexible electronic systems. Here, we show that a flexible nonvolatile logic-in-memory circuit enablin...Flexible logic circuits and memory with ultra-low static power consumption are in great demand for battery-powered flexible electronic systems. Here, we show that a flexible nonvolatile logic-in-memory circuit enabling normally-off computing can be implemented using a poly（1,3,5-trivinyl-l,3,5-trimethyl cyclotrisiloxane） （pV3D3）-based memristor array. Although memristive logic-in-memory circuits have been previously reported, the requirements of additional components and the large variation of memristors have limited demonstrations to simple gates within a few operation cycles on rigid substrates only. Using memristor-aided logic （MAGIC） architecture requiring only memristors and pV3D3-memristor with good uniformity on a flexible substrate, for the first time, we experimentally demonstrated our implementation of MAGIC-NOT and -NOR gates during multiple cycles and even under bent conditions. Other functions, such as OR, AND, NAND, and a half adder, are also realized by combinations of NOT and NOR gates within a crossbar array. This research advances the development of novel computing architecture with zero static power consumption for battery- powered flexible electronic systems.展开更多
A combination of self-aligned fluoride-based plasma treatment and post-gate rapid thermal annealing was developed to fabricate a novel 120-nm T-shaped gate normally-off metamorphic Al0.49In0.51As/Ga0.47In0.53 As HEMT ...A combination of self-aligned fluoride-based plasma treatment and post-gate rapid thermal annealing was developed to fabricate a novel 120-nm T-shaped gate normally-off metamorphic Al0.49In0.51As/Ga0.47In0.53 As HEMT device on a Si substrate grown by metal-organic chemical vapor deposition（MOCVD）. A shift of the threshold voltage, from-0.42 V to 0.11 V was obtained and the shift can be effectively adjusted by the process parameter of CF4 plasma treatment. Furthermore, a side benefit of reducing the leakage current of the device up to two orders of magnitude was also observed.E-mode transistors with 120 nm gate length own fTup to 160 GHz and fmax of 140 GHz. These characteristics imply the potential of the fluoride-based plasma treatment technology for the fabrication of monolithic enhancement/depletion-mode mHEMTs, which also encourage the massive production with this low-cost technology.展开更多
AlGaN/GaN heterojunction field-effect transistors(HFETs)with p-GaN cap layer are developed for normally-off operation,in which an in-situ grown AlN layer is utilized as the gate insulator.Compared with the SiNxgate in...AlGaN/GaN heterojunction field-effect transistors(HFETs)with p-GaN cap layer are developed for normally-off operation,in which an in-situ grown AlN layer is utilized as the gate insulator.Compared with the SiNxgate insulator,the AlN/p-GaN interface presents a more obvious energy band bending and a wider depletion region,which helps to positively shift the threshold voltage.In addition,the relatively large conduction band offset of AlN/p-GaN is beneficial to suppress the gate leakage current and enhance the gate breakdown voltage.Owing to the introduction of AlN layer,normally-off p-GaN capped AlGaN/GaN HFET with a threshold voltage of 4 V and a gate swing of 13 V is realized.Furthermore,the field-effect mobility is approximately 1500 cm^(2)·V^(-1)·s^(-1)in the 2DEG channel,implying a good device performance.展开更多
Based on the self-terminating thermal oxidation-assisted wet etching technique,two kinds of enhancement mode Al_(2)O_(3)/GaN MOSFETs(metal-oxide-semiconductor field-effect transistors)separately with sapphire substrat...Based on the self-terminating thermal oxidation-assisted wet etching technique,two kinds of enhancement mode Al_(2)O_(3)/GaN MOSFETs(metal-oxide-semiconductor field-effect transistors)separately with sapphire substrate and Si sub-strate are prepared.It is found that the performance of sapphire substrate device is better than that of silicon substrate.Comparing these two devices,the maximum drain current of sapphire substrate device(401 mA/mm)is 1.76 times that of silicon substrate device(228 mA/mm),and the field-effect mobility(μ_(FEmax))of sapphire substrate device(176 cm^(2)/V·s)is 1.83 times that of silicon substrate device(96 cm^(2)/V·s).The conductive resistance of silicon substrate device is 21.2Ω-mm,while that of sapphire substrate device is only 15.2Ω·mm,which is 61%that of silicon substrate device.The significant difference in performance between sapphire substrate and Si substrate is related to the differences in interface and border trap near Al_(2)O_(3)/GaN interface.Experimental studies show that(i)interface/border trap density in the sapphire substrate device is one order of magnitude lower than in the Si substrate device,(ii)Both the border traps in Al_(2)O_(3) dielectric near Al_(2)O_(3)/GaN and the interface traps in Al_(2)O_(3)/GaN interface have a significantly effect on device channel mobility,and(iii)the properties of gallium nitride materials on different substrates are different due to wet etching.The research results in this work provide a reference for further optimizing the performances of silicon substrate devices.展开更多
A novel normally-off AlGaN/GaN high-electron-mobility transistor(HEMT)with a p-GaN Schottky hybrid gate(PSHG)is proposed,and compared with the conventional p-GaN normally-off AlGaN/GaN HEMTs.This structure can be real...A novel normally-off AlGaN/GaN high-electron-mobility transistor(HEMT)with a p-GaN Schottky hybrid gate(PSHG)is proposed,and compared with the conventional p-GaN normally-off AlGaN/GaN HEMTs.This structure can be realized by selective etching of p-GaN layer,which enables the Schottky junction and PN junction to control the channel charge at the same time.The direct current(DC)and switching characteristics of the PSHG HEMTs are simulated by Slivaco TCAD,and the p-GaN HEMTs and conventional normally-on HEMTs are also simulated for comparison.The simulation results show that the PSHG HEMTs have a higher current density and a lower on-resistance than p-GaN HEMTs,which is more obvious with the decrease of p-GaN ratios of the PSHG HEMTs.The breakdown voltage and threshold voltage of the PSHG HEMTs are very close to those of the p-GaN HEMTs.In addition,the PSHG HEMTs have a higher switching speed than the conventional normally-on HEMTs,and the p-GaN layer ratio has no obvious effect on the switching speed.展开更多
氮化镓(gallium nitride,GaN)材料因其优秀的物理特性受到越来越多研究者的青睐,但常关型GaN基高电子迁移率晶体管(high electron mobility transistor,HEMT)技术发展尚处于初级阶段。文中的研究对象是薄势垒常关型HEMT,该类器件可以很...氮化镓(gallium nitride,GaN)材料因其优秀的物理特性受到越来越多研究者的青睐,但常关型GaN基高电子迁移率晶体管(high electron mobility transistor,HEMT)技术发展尚处于初级阶段。文中的研究对象是薄势垒常关型HEMT,该类器件可以很大程度地降低栅极区域的刻蚀损伤,因此在未来的电力电子市场中极具潜力。文中工作中制备基于SiON/Al_(2)O_(3)叠层栅介质的薄势垒型HEMT器件,在叠层介质的帮助下,器件的阈值电压与肖特基栅极器件几乎一致,可以实现常关型操作。其最大关态击穿电压可以达到700V,栅极耐压超过23V,在超过1000s的正栅应力测试中阈值电压漂移量小于1V。通过对其关态击穿、栅极击穿、栅极应力测试等特性的分析,对其可靠性方面有更为深入的认识,同时进一步地展现出薄势垒HEMT器件的结构优势。展开更多
We report a selective area growth（SAG） method to define the p-GaN gate of AlGaN/GaN high electron mobility transistors（HEMTs） by metal-organic chemical vapor deposition.Compared with Schottky gate HEMTs,the SAG p-...We report a selective area growth（SAG） method to define the p-GaN gate of AlGaN/GaN high electron mobility transistors（HEMTs） by metal-organic chemical vapor deposition.Compared with Schottky gate HEMTs,the SAG p-GaN gate HEMTs show more positive threshold voltage（Vth） and better gate control ability.The influence of Cp2Mg flux of SAG p-GaN gate on the AlGaN/GaN HEMTs has also been studied.With the increasing Cp2Mg from 0.16 μmol/min to 0.20 μmol/min,the Vth raises from-0.67 V to-0.37 V.The maximum transconductance of the SAG HEMT at a drain voltage of 10 V is 113.9 mS/mm while that value of the Schottky HEMT is 51.6 mS/mm.The SAG method paves a promising way for achieving p-GaN gate normally-off AlGaN/GaN HEMTs without dry etching damage.展开更多
基金supported by the National High Technology Research and Development Program of China(Grant No.2011AA050401)the National Science Fundfor Distinguished Young Scholars,China(Grant No.51225701)
文摘We present the design consideration and fabrication of 4H-SiC trenched-and-implanted vertical junction field-effect transistors （TI-VJFETs）. Different design factors, including channel width, channel doping, and mesa height, are con- sidered and evaluated by numerical simulations. Based on the simulation result, normally-on and normally-off devices are fabricated. The fabricated device has a 12 μm thick drift layer with 8 × 10^15 cm^-3 N-type doping and 2.6 μm channel length. The normally-on device shows a 1.2 kV blocking capability with a minimum on-state resistance of 2.33 mΩ.cm2, while the normally-off device shows an on-state resistance of 3.85 mΩ.cm2. Both the on-state and the blocking performances of the device are close to the state-of-the-art values in this voltage range.
文摘Traditional digital processing approaches are based on semiconductor transistors, which suffer from high power consumption, aggravating with technology node scaling. To solve definitively this problem, a number of emerging non-volatile nanodevices are under intense investigations. Meanwhile, novel computing circuits are invented to dig the full potential of the nanodevices. The combination of non-volatile nanodevices with suitable computing paradigms have many merits compared with the complementary metal-oxide-semiconductor transistor （CMOS） technology based structures, such as zero standby power, ultra-high density, non-volatility, and acceptable access speed. In this paper, we overview and compare the computing paradigms based on the emerging nanodevices towards ultra-low dissipation.
文摘Flexible logic circuits and memory with ultra-low static power consumption are in great demand for battery-powered flexible electronic systems. Here, we show that a flexible nonvolatile logic-in-memory circuit enabling normally-off computing can be implemented using a poly（1,3,5-trivinyl-l,3,5-trimethyl cyclotrisiloxane） （pV3D3）-based memristor array. Although memristive logic-in-memory circuits have been previously reported, the requirements of additional components and the large variation of memristors have limited demonstrations to simple gates within a few operation cycles on rigid substrates only. Using memristor-aided logic （MAGIC） architecture requiring only memristors and pV3D3-memristor with good uniformity on a flexible substrate, for the first time, we experimentally demonstrated our implementation of MAGIC-NOT and -NOR gates during multiple cycles and even under bent conditions. Other functions, such as OR, AND, NAND, and a half adder, are also realized by combinations of NOT and NOR gates within a crossbar array. This research advances the development of novel computing architecture with zero static power consumption for battery- powered flexible electronic systems.
基金This work is supported by the National High Technology Research and Development Program of China(No.2014 AA 032606)and the National Natural Sciences Foundation of China(No.61376090,61306008).
基金Project supported by the Young Scientists Fund of the National Natural Science Foundation,China(Grant No.61401373)the Fundamental Research Funds for Central University,China(Grant No.XDJK2013B004 and 2362014XK13)the Research Fund for the Doctoral Program of Southwest University,China(Grant No.SWU111030)
文摘A combination of self-aligned fluoride-based plasma treatment and post-gate rapid thermal annealing was developed to fabricate a novel 120-nm T-shaped gate normally-off metamorphic Al0.49In0.51As/Ga0.47In0.53 As HEMT device on a Si substrate grown by metal-organic chemical vapor deposition（MOCVD）. A shift of the threshold voltage, from-0.42 V to 0.11 V was obtained and the shift can be effectively adjusted by the process parameter of CF4 plasma treatment. Furthermore, a side benefit of reducing the leakage current of the device up to two orders of magnitude was also observed.E-mode transistors with 120 nm gate length own fTup to 160 GHz and fmax of 140 GHz. These characteristics imply the potential of the fluoride-based plasma treatment technology for the fabrication of monolithic enhancement/depletion-mode mHEMTs, which also encourage the massive production with this low-cost technology.
基金Supported by the National Natural Science Foundation of China(Grant No.61904207)scientific research support foundation for introduced high-level talents of Shenyang Ligong University(Grant No.1010147000914)the Natural Science Foundation of Sichuan Province,China(Grant No.2022NSFSC0886)
文摘AlGaN/GaN heterojunction field-effect transistors(HFETs)with p-GaN cap layer are developed for normally-off operation,in which an in-situ grown AlN layer is utilized as the gate insulator.Compared with the SiNxgate insulator,the AlN/p-GaN interface presents a more obvious energy band bending and a wider depletion region,which helps to positively shift the threshold voltage.In addition,the relatively large conduction band offset of AlN/p-GaN is beneficial to suppress the gate leakage current and enhance the gate breakdown voltage.Owing to the introduction of AlN layer,normally-off p-GaN capped AlGaN/GaN HFET with a threshold voltage of 4 V and a gate swing of 13 V is realized.Furthermore,the field-effect mobility is approximately 1500 cm^(2)·V^(-1)·s^(-1)in the 2DEG channel,implying a good device performance.
基金Project supported by the Research on Key Techniques in Reliability of Low Power Sensor Chip for IOTIPS and the Technology Project of Headquarters,State Grid Corporation of China(Grant No.5700-202041397A-0-0-00).
文摘Based on the self-terminating thermal oxidation-assisted wet etching technique,two kinds of enhancement mode Al_(2)O_(3)/GaN MOSFETs(metal-oxide-semiconductor field-effect transistors)separately with sapphire substrate and Si sub-strate are prepared.It is found that the performance of sapphire substrate device is better than that of silicon substrate.Comparing these two devices,the maximum drain current of sapphire substrate device(401 mA/mm)is 1.76 times that of silicon substrate device(228 mA/mm),and the field-effect mobility(μ_(FEmax))of sapphire substrate device(176 cm^(2)/V·s)is 1.83 times that of silicon substrate device(96 cm^(2)/V·s).The conductive resistance of silicon substrate device is 21.2Ω-mm,while that of sapphire substrate device is only 15.2Ω·mm,which is 61%that of silicon substrate device.The significant difference in performance between sapphire substrate and Si substrate is related to the differences in interface and border trap near Al_(2)O_(3)/GaN interface.Experimental studies show that(i)interface/border trap density in the sapphire substrate device is one order of magnitude lower than in the Si substrate device,(ii)Both the border traps in Al_(2)O_(3) dielectric near Al_(2)O_(3)/GaN and the interface traps in Al_(2)O_(3)/GaN interface have a significantly effect on device channel mobility,and(iii)the properties of gallium nitride materials on different substrates are different due to wet etching.The research results in this work provide a reference for further optimizing the performances of silicon substrate devices.
基金supported by the National Natural Science Foundation of China(Grant No.62004150)Postdoctoral Science Foundation of China(Grant No.2018M643575)the Fundamental Research Funds for the Central Universities,and the Innovation Fund of Xidian University(Grant No.JB211104)。
文摘A novel normally-off AlGaN/GaN high-electron-mobility transistor(HEMT)with a p-GaN Schottky hybrid gate(PSHG)is proposed,and compared with the conventional p-GaN normally-off AlGaN/GaN HEMTs.This structure can be realized by selective etching of p-GaN layer,which enables the Schottky junction and PN junction to control the channel charge at the same time.The direct current(DC)and switching characteristics of the PSHG HEMTs are simulated by Slivaco TCAD,and the p-GaN HEMTs and conventional normally-on HEMTs are also simulated for comparison.The simulation results show that the PSHG HEMTs have a higher current density and a lower on-resistance than p-GaN HEMTs,which is more obvious with the decrease of p-GaN ratios of the PSHG HEMTs.The breakdown voltage and threshold voltage of the PSHG HEMTs are very close to those of the p-GaN HEMTs.In addition,the PSHG HEMTs have a higher switching speed than the conventional normally-on HEMTs,and the p-GaN layer ratio has no obvious effect on the switching speed.
文摘氮化镓(gallium nitride,GaN)材料因其优秀的物理特性受到越来越多研究者的青睐,但常关型GaN基高电子迁移率晶体管(high electron mobility transistor,HEMT)技术发展尚处于初级阶段。文中的研究对象是薄势垒常关型HEMT,该类器件可以很大程度地降低栅极区域的刻蚀损伤,因此在未来的电力电子市场中极具潜力。文中工作中制备基于SiON/Al_(2)O_(3)叠层栅介质的薄势垒型HEMT器件,在叠层介质的帮助下,器件的阈值电压与肖特基栅极器件几乎一致,可以实现常关型操作。其最大关态击穿电压可以达到700V,栅极耐压超过23V,在超过1000s的正栅应力测试中阈值电压漂移量小于1V。通过对其关态击穿、栅极击穿、栅极应力测试等特性的分析,对其可靠性方面有更为深入的认识,同时进一步地展现出薄势垒HEMT器件的结构优势。
基金Project supported by the National Natural Sciences Foundation of China(Nos.61376090,61306008)the National High Technology Program of China(No.2014AA032606)
文摘We report a selective area growth（SAG） method to define the p-GaN gate of AlGaN/GaN high electron mobility transistors（HEMTs） by metal-organic chemical vapor deposition.Compared with Schottky gate HEMTs,the SAG p-GaN gate HEMTs show more positive threshold voltage（Vth） and better gate control ability.The influence of Cp2Mg flux of SAG p-GaN gate on the AlGaN/GaN HEMTs has also been studied.With the increasing Cp2Mg from 0.16 μmol/min to 0.20 μmol/min,the Vth raises from-0.67 V to-0.37 V.The maximum transconductance of the SAG HEMT at a drain voltage of 10 V is 113.9 mS/mm while that value of the Schottky HEMT is 51.6 mS/mm.The SAG method paves a promising way for achieving p-GaN gate normally-off AlGaN/GaN HEMTs without dry etching damage.
