Silicon on insulator (SOI) technology permits a good solution to the miniaturization as the MOSFET size scales down. This paper is about to compare the electrical performance of nanoscale FD-SOI MOSFET at various gate...Silicon on insulator (SOI) technology permits a good solution to the miniaturization as the MOSFET size scales down. This paper is about to compare the electrical performance of nanoscale FD-SOI MOSFET at various gate lengths. The performance is compared and contrasted with the help of threshold voltage, subthreshold slope, on-state current and leakage current. Interestingly, by decreasing the gate length, the leakage current and on-state current are increased but the threshold voltage is decreased and the sub-threshold slope is degraded. Silvaco two-dimensional simulations are used to analyze the performance of the proposed structures.展开更多
We report on an indium antimonide high electron mobility transistor with record cut-off frequency characteristics. For high frequency response it is important to minimize parasitic resistance and capacitance to improv...We report on an indium antimonide high electron mobility transistor with record cut-off frequency characteristics. For high frequency response it is important to minimize parasitic resistance and capacitance to improve short-channel effects. For analog applications adequate pinch-off behavior is demonstrated. For proper device scaling we need high electron mobility and high electron density. Toward this end, the device design features and simulation are carried out by the Synopsys TCAD tool. A 30 nm InSb HEMT exhibits an excellent cut-off frequency of 586 GHz. To the knowledge of the authors, the obtained cut-off frequency is the highest ever reported in any FET on any material system.展开更多
The influence of PMOSFET gate length on the parameter degradation relations under negative bias temperature insta- bility （NBTI） stress is studied. The threshold voltage degradation increases with reducing the gate ...The influence of PMOSFET gate length on the parameter degradation relations under negative bias temperature insta- bility （NBTI） stress is studied. The threshold voltage degradation increases with reducing the gate length. By calculating the relations between the threshold voltage and the linear/saturation drain current, we obtain their correlation coefficients. Comparing the test result with the calculated linear/saturation current value, we obtain the ratio factors. The ratio factors decrease differently when the gate length diminishes. When the gate length reduces to some degree, the linear ratio factor decreases from greater than 1 to nearly 1, but the saturation factor decreases from greater than l to smaller than 1. This results from the influence of mobility and the velocity saturation effect. Moreover, due to the un-uniform distribution of potential damages along the channel, the descending slopes of the curve are different.展开更多
The effects of gate length L_G on breakdown voltage VBRare investigated in AlGaN/GaN high-electron-mobility transistors（HEMTs） with L_G= 1 μm^20 μm. With the increase of L_G, VBRis first increased, and then satura...The effects of gate length L_G on breakdown voltage VBRare investigated in AlGaN/GaN high-electron-mobility transistors（HEMTs） with L_G= 1 μm^20 μm. With the increase of L_G, VBRis first increased, and then saturated at LG= 3 μm. For the HEMT with L_G= 1 μm, breakdown voltage VBRis 117 V, and it can be enhanced to 148 V for the HEMT with L-_G= 3 μm. The gate length of 3 μm can alleviate the buffer-leakage-induced impact ionization compared with the gate length of 1 μm, and the suppression of the impact ionization is the reason for improving the breakdown voltage.A similar suppression of the impact ionization exists in the HEMTs with LG〉 3 μm. As a result, there is no obvious difference in breakdown voltage among the HEMTs with LG= 3 μm^20 μm, and their breakdown voltages are in a range of 140 V–156 V.展开更多
本文对PD SOI NMOS器件进行了60Coγ射线总剂量辐照的实验测试,分析了不同的栅长对器件辐射效应的影响及其物理机理.研究结果表明,短沟道器件辐照后感生的界面态密度更大,使器件跨导出现退化.PD SOI器件的局部浮体效应是造成不同栅长器...本文对PD SOI NMOS器件进行了60Coγ射线总剂量辐照的实验测试,分析了不同的栅长对器件辐射效应的影响及其物理机理.研究结果表明,短沟道器件辐照后感生的界面态密度更大,使器件跨导出现退化.PD SOI器件的局部浮体效应是造成不同栅长器件辐照后输出特性变化不一致的主要原因.短沟道器件输出特性的击穿电压更低.在关态偏置条件下,由于背栅晶体管更严重的辐射效应,短沟道SOI器件的电离辐射效应比同样偏置条件下长沟道器件严重.展开更多
An 80-nm gate length metamorphic high electron mobility transistor （mHEMT） on a GaAs substrate with high indium composite compound-channels Ino.7Ga0.aAs/Ino.6Gao.aAs and an optimized grade buffer scheme is presented...An 80-nm gate length metamorphic high electron mobility transistor （mHEMT） on a GaAs substrate with high indium composite compound-channels Ino.7Ga0.aAs/Ino.6Gao.aAs and an optimized grade buffer scheme is presented. High 2-DEG Hall mobility values of 10200 cm2/（V.s） and a sheet density of 3.5 x 10^12 cm-2 at 300 K have been achieved. The device＇s T-shaped gate was made by utilizing a simple three layers electron beam resist, instead of employing a passivation layer for the T-share gate, which is beneficial to decreasing parasitic capacitance and parasitic resistance of the gate and simplifying the device manufacturing process. The ohmic contact resistance Rc is 0.2 n.mm when using the same metal system with the gate （Pt/Ti/Pt/Au）, which reduces the manufacturing cycle of the device. The mHEMT device demonstrates excellent DC and RF characteristics. The peak extrinsic transconductance of 1.1 S/mm and the maximum drain current density of 0.86 A/mm are obtained. The unity current gain cut-off frequency （fT） and the maximum oscillation frequency （fmax） are 246 and 301 GHz, respectively.展开更多
An indium antimonide based QWFET（quantum well field effect transistor） with the gate length down to 50 nm has been designed and investigated for the first time for L-band radar applications at 230 GHz. QWFETs are de...An indium antimonide based QWFET（quantum well field effect transistor） with the gate length down to 50 nm has been designed and investigated for the first time for L-band radar applications at 230 GHz. QWFETs are designed at the high performance node of the International Technology Road Map for Semiconductors（ITRS）requirements of drive current（Semiconductor Industry Association 2010）. The performance of the device is investigated using the SYNOPSYS CAD（TCAD） software. In Sb based QWFET could be a promising device technology for very low power and ultra-high speed performance with 5–10 times low DC power dissipation.展开更多
An 88 nm gate-length In0.53Ga0.47As/In0.52Alo.48As InP-based high electron mobility transistor （HEMT） was successfully fabricated with a gate width of 2× 50 μm and source-drain space of 2.4μm. The T-gate was ...An 88 nm gate-length In0.53Ga0.47As/In0.52Alo.48As InP-based high electron mobility transistor （HEMT） was successfully fabricated with a gate width of 2× 50 μm and source-drain space of 2.4μm. The T-gate was defined by electron beam lithography in a trilayer of PMMA/A1/UVIII. The exposure dose and the development time were optimized, and followed by an appropriate residual resist removal process. These devices also demonstrated excellent DC and RF characteristics： the extrinsic maximum transconductance, the full channel cur- rent, the threshold voltage, the current gain cutoff frequency and the maximum oscillation frequency of the HEMTs were 765 mS/mm, 591 mA/mm, -0.5 V, 150 GHz and 201 GHz, respectively. The HEMTs are promising for use in millimeter-wave integrated circuits.展开更多
AW-bandtwo-stageamplifierMMIChasbeendevelopedusingafullypassivated 2 × 20 μm gate-width and 0.15 μm gate-length InP-based high electron mobility transistor （HEMT） technology. The two-stage amplifier has been ...AW-bandtwo-stageamplifierMMIChasbeendevelopedusingafullypassivated 2 × 20 μm gate-width and 0.15 μm gate-length InP-based high electron mobility transistor （HEMT） technology. The two-stage amplifier has been realized in combination with a coplanar waveguide technique and cascode topology, thus leading to a compact chip-size of 1.85 × 0.932 mm^2 and an excellent small-signal gain of 25.7 dB at 106 GHz. Additionally, an inter-digital coupling capacitor blocks low-frequency signal, thereby enhancing the stability of the amplifier. The successful design of the two-stage amplifier MMIC indicates that InP HEMT technology has a great potential for W-band applications.展开更多
文摘Silicon on insulator (SOI) technology permits a good solution to the miniaturization as the MOSFET size scales down. This paper is about to compare the electrical performance of nanoscale FD-SOI MOSFET at various gate lengths. The performance is compared and contrasted with the help of threshold voltage, subthreshold slope, on-state current and leakage current. Interestingly, by decreasing the gate length, the leakage current and on-state current are increased but the threshold voltage is decreased and the sub-threshold slope is degraded. Silvaco two-dimensional simulations are used to analyze the performance of the proposed structures.
文摘We report on an indium antimonide high electron mobility transistor with record cut-off frequency characteristics. For high frequency response it is important to minimize parasitic resistance and capacitance to improve short-channel effects. For analog applications adequate pinch-off behavior is demonstrated. For proper device scaling we need high electron mobility and high electron density. Toward this end, the device design features and simulation are carried out by the Synopsys TCAD tool. A 30 nm InSb HEMT exhibits an excellent cut-off frequency of 586 GHz. To the knowledge of the authors, the obtained cut-off frequency is the highest ever reported in any FET on any material system.
基金supported by the National Basic Research Program of China(Grant No.2011CBA00606)the National Natural Science Foundation of China(Grant Nos.61334002,61106106,and 61176130)the Fundamental Research Fund for the Central Universities of China(Grant No.JB140415)
文摘The influence of PMOSFET gate length on the parameter degradation relations under negative bias temperature insta- bility （NBTI） stress is studied. The threshold voltage degradation increases with reducing the gate length. By calculating the relations between the threshold voltage and the linear/saturation drain current, we obtain their correlation coefficients. Comparing the test result with the calculated linear/saturation current value, we obtain the ratio factors. The ratio factors decrease differently when the gate length diminishes. When the gate length reduces to some degree, the linear ratio factor decreases from greater than 1 to nearly 1, but the saturation factor decreases from greater than l to smaller than 1. This results from the influence of mobility and the velocity saturation effect. Moreover, due to the un-uniform distribution of potential damages along the channel, the descending slopes of the curve are different.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.61334002,61106106,and 61204085)
文摘The effects of gate length L_G on breakdown voltage VBRare investigated in AlGaN/GaN high-electron-mobility transistors（HEMTs） with L_G= 1 μm^20 μm. With the increase of L_G, VBRis first increased, and then saturated at LG= 3 μm. For the HEMT with L_G= 1 μm, breakdown voltage VBRis 117 V, and it can be enhanced to 148 V for the HEMT with L-_G= 3 μm. The gate length of 3 μm can alleviate the buffer-leakage-induced impact ionization compared with the gate length of 1 μm, and the suppression of the impact ionization is the reason for improving the breakdown voltage.A similar suppression of the impact ionization exists in the HEMTs with LG〉 3 μm. As a result, there is no obvious difference in breakdown voltage among the HEMTs with LG= 3 μm^20 μm, and their breakdown voltages are in a range of 140 V–156 V.
文摘本文对PD SOI NMOS器件进行了60Coγ射线总剂量辐照的实验测试,分析了不同的栅长对器件辐射效应的影响及其物理机理.研究结果表明,短沟道器件辐照后感生的界面态密度更大,使器件跨导出现退化.PD SOI器件的局部浮体效应是造成不同栅长器件辐照后输出特性变化不一致的主要原因.短沟道器件输出特性的击穿电压更低.在关态偏置条件下,由于背栅晶体管更严重的辐射效应,短沟道SOI器件的电离辐射效应比同样偏置条件下长沟道器件严重.
基金supported by the Key Laboratory of Nano-Devices and Applications,Nano-Fabrication Facility of SINANO,Chinese Academy of Sciencesthe National Natural Science Foundation of China(Nos.61274077,61474031,61464003)+3 种基金the Guangxi Natural Science Foundation(Nos.2013GXNSFGA019003,2013GXNSFAA019335)the National Basic Research Program of China(Nos.2011CBA00605,2010CB327501)the Project(No.9140C140101140C14069)the Innovation Project of GUET Graduate Education(Nos.GDYCSZ201448,GDYCSZ201449,YJCXS201529)
文摘An 80-nm gate length metamorphic high electron mobility transistor （mHEMT） on a GaAs substrate with high indium composite compound-channels Ino.7Ga0.aAs/Ino.6Gao.aAs and an optimized grade buffer scheme is presented. High 2-DEG Hall mobility values of 10200 cm2/（V.s） and a sheet density of 3.5 x 10^12 cm-2 at 300 K have been achieved. The device＇s T-shaped gate was made by utilizing a simple three layers electron beam resist, instead of employing a passivation layer for the T-share gate, which is beneficial to decreasing parasitic capacitance and parasitic resistance of the gate and simplifying the device manufacturing process. The ohmic contact resistance Rc is 0.2 n.mm when using the same metal system with the gate （Pt/Ti/Pt/Au）, which reduces the manufacturing cycle of the device. The mHEMT device demonstrates excellent DC and RF characteristics. The peak extrinsic transconductance of 1.1 S/mm and the maximum drain current density of 0.86 A/mm are obtained. The unity current gain cut-off frequency （fT） and the maximum oscillation frequency （fmax） are 246 and 301 GHz, respectively.
文摘An indium antimonide based QWFET（quantum well field effect transistor） with the gate length down to 50 nm has been designed and investigated for the first time for L-band radar applications at 230 GHz. QWFETs are designed at the high performance node of the International Technology Road Map for Semiconductors（ITRS）requirements of drive current（Semiconductor Industry Association 2010）. The performance of the device is investigated using the SYNOPSYS CAD（TCAD） software. In Sb based QWFET could be a promising device technology for very low power and ultra-high speed performance with 5–10 times low DC power dissipation.
文摘An 88 nm gate-length In0.53Ga0.47As/In0.52Alo.48As InP-based high electron mobility transistor （HEMT） was successfully fabricated with a gate width of 2× 50 μm and source-drain space of 2.4μm. The T-gate was defined by electron beam lithography in a trilayer of PMMA/A1/UVIII. The exposure dose and the development time were optimized, and followed by an appropriate residual resist removal process. These devices also demonstrated excellent DC and RF characteristics： the extrinsic maximum transconductance, the full channel cur- rent, the threshold voltage, the current gain cutoff frequency and the maximum oscillation frequency of the HEMTs were 765 mS/mm, 591 mA/mm, -0.5 V, 150 GHz and 201 GHz, respectively. The HEMTs are promising for use in millimeter-wave integrated circuits.
基金Project supported by the National Basic Research Program of China(Nos.2010CB327502,2010CB327505)the Advance Research Project(No.5130803XXXX)
文摘AW-bandtwo-stageamplifierMMIChasbeendevelopedusingafullypassivated 2 × 20 μm gate-width and 0.15 μm gate-length InP-based high electron mobility transistor （HEMT） technology. The two-stage amplifier has been realized in combination with a coplanar waveguide technique and cascode topology, thus leading to a compact chip-size of 1.85 × 0.932 mm^2 and an excellent small-signal gain of 25.7 dB at 106 GHz. Additionally, an inter-digital coupling capacitor blocks low-frequency signal, thereby enhancing the stability of the amplifier. The successful design of the two-stage amplifier MMIC indicates that InP HEMT technology has a great potential for W-band applications.
