为了增加单位增益频率与压摆率,并能够工作在低电源电压下,同时降低偏置电流,提出了一种改进的基于0.18μm CMOS工艺的AB类放大器,其采用多级放大器结构,第一级为具有电流镜负载的NMOS差分对,第二反相级由共源放大器实现,第三极为AB类...为了增加单位增益频率与压摆率,并能够工作在低电源电压下,同时降低偏置电流,提出了一种改进的基于0.18μm CMOS工艺的AB类放大器,其采用多级放大器结构,第一级为具有电流镜负载的NMOS差分对,第二反相级由共源放大器实现,第三极为AB类放大器,其能够在±500 m V电源下工作.电路仿真结果显示该放大器相位裕度为87°;总补偿电容为5 p F,与传统放大器相比减少了50%;单位增益频率为21.17 MHz,比传统放大器增大约10倍;压摆率为7.5和8.57 V/μs,与传统电路相比,分别增加了2.8倍和2.6倍.此外,与其他文献相比,该放大器具有较大的单位增益带宽和压摆率以及较小的功耗.展开更多
A fully-differential switched-capacitor sample-and-hold （S/H） circuit used in a 10-bit 50-MS/s pipeline analog-to-digital converter （ADC） was designed and fabricated using a 0.35-μm CMOS process. Capacitor flip-a...A fully-differential switched-capacitor sample-and-hold （S/H） circuit used in a 10-bit 50-MS/s pipeline analog-to-digital converter （ADC） was designed and fabricated using a 0.35-μm CMOS process. Capacitor flip-around architecture was used in the S/H circuit to lower the power consumption. In addition, a gain-boosted operational transconductance amplifier （OTA） was designed with a DC gain of 94 dB and a unit gain bandwidth of 460 MHz at a phase margin of 63 degree, which matches the S/H circuit. A novel double-side bootstrapped switch was used, improving the precision of the whole circuit. The measured results have shown that the S/H circuit reaches a spurious free dynamic range （SFDR） of 67 dB and a signal-to-noise ratio （SNR） of 62.1 dB for a 2.5 MHz input signal with 50 MS/s sampling rate. The 0.12mm^2 S/H circuit operates from a 3.3 V supply and consumes 13.6 mW.展开更多
Optical brain imaging using functional near infra-red spectroscopy (fNIRS) offers a portable and noninvasive tool for monitoring of blood oxygenation. In this paper we have introduced a new miniaturized photodetector ...Optical brain imaging using functional near infra-red spectroscopy (fNIRS) offers a portable and noninvasive tool for monitoring of blood oxygenation. In this paper we have introduced a new miniaturized photodetector front-end on achip to be applied in a portable fNIRS system. It includes silicon avalanche photodiodes (SiAPD), Transimpedance amplifier (TIA) front-end and Quench-Reset circuitry to operate in both linear and Geiger modes. So it can be applied for both continuous-wave fNIRS (CW-fNIRS) and also single-photon counting. Proposed SiAPD exhibits high-avalanche gain (>100), low-breakdown voltage ( V) and high photon detection efficiency accompanying with low dark count rates. The proposed TIA front-end offer a low power consumption ( mW), high-transimpedance gain (up to 250 MV/A), tunable bandwidth (1 kHz - 1 GHz) and very low input and output noise (~few fA/√Hz and few μV/√Hz). The Geiger-mode photon counting front-end also exhibits a controllable hold-off and rest time with an ultra fast quench-reset time (few ns). This integrated system has been implemented using submicron (0.35 μm) standard CMOS technology.展开更多
文摘为了增加单位增益频率与压摆率,并能够工作在低电源电压下,同时降低偏置电流,提出了一种改进的基于0.18μm CMOS工艺的AB类放大器,其采用多级放大器结构,第一级为具有电流镜负载的NMOS差分对,第二反相级由共源放大器实现,第三极为AB类放大器,其能够在±500 m V电源下工作.电路仿真结果显示该放大器相位裕度为87°;总补偿电容为5 p F,与传统放大器相比减少了50%;单位增益频率为21.17 MHz,比传统放大器增大约10倍;压摆率为7.5和8.57 V/μs,与传统电路相比,分别增加了2.8倍和2.6倍.此外,与其他文献相比,该放大器具有较大的单位增益带宽和压摆率以及较小的功耗.
基金supported by the National High Technology Research and Development Program of China(No.2002AA1Z1200)
文摘A fully-differential switched-capacitor sample-and-hold （S/H） circuit used in a 10-bit 50-MS/s pipeline analog-to-digital converter （ADC） was designed and fabricated using a 0.35-μm CMOS process. Capacitor flip-around architecture was used in the S/H circuit to lower the power consumption. In addition, a gain-boosted operational transconductance amplifier （OTA） was designed with a DC gain of 94 dB and a unit gain bandwidth of 460 MHz at a phase margin of 63 degree, which matches the S/H circuit. A novel double-side bootstrapped switch was used, improving the precision of the whole circuit. The measured results have shown that the S/H circuit reaches a spurious free dynamic range （SFDR） of 67 dB and a signal-to-noise ratio （SNR） of 62.1 dB for a 2.5 MHz input signal with 50 MS/s sampling rate. The 0.12mm^2 S/H circuit operates from a 3.3 V supply and consumes 13.6 mW.
文摘Optical brain imaging using functional near infra-red spectroscopy (fNIRS) offers a portable and noninvasive tool for monitoring of blood oxygenation. In this paper we have introduced a new miniaturized photodetector front-end on achip to be applied in a portable fNIRS system. It includes silicon avalanche photodiodes (SiAPD), Transimpedance amplifier (TIA) front-end and Quench-Reset circuitry to operate in both linear and Geiger modes. So it can be applied for both continuous-wave fNIRS (CW-fNIRS) and also single-photon counting. Proposed SiAPD exhibits high-avalanche gain (>100), low-breakdown voltage ( V) and high photon detection efficiency accompanying with low dark count rates. The proposed TIA front-end offer a low power consumption ( mW), high-transimpedance gain (up to 250 MV/A), tunable bandwidth (1 kHz - 1 GHz) and very low input and output noise (~few fA/√Hz and few μV/√Hz). The Geiger-mode photon counting front-end also exhibits a controllable hold-off and rest time with an ultra fast quench-reset time (few ns). This integrated system has been implemented using submicron (0.35 μm) standard CMOS technology.
