为了在薄埋氧层SOI衬底上实现超高耐压LDMOS铺平道路,提出了一种具有P埋层(BPL)的薄埋氧层SOI LDMOS结构,耐压1200V以上。该BPL SOI LDMOS在传统SOI LDMOS的埋氧层和N型漂移区之间引入了一个P型埋层。当器件正向截止时,N型漂移区与P埋...为了在薄埋氧层SOI衬底上实现超高耐压LDMOS铺平道路,提出了一种具有P埋层(BPL)的薄埋氧层SOI LDMOS结构,耐压1200V以上。该BPL SOI LDMOS在传统SOI LDMOS的埋氧层和N型漂移区之间引入了一个P型埋层。当器件正向截止时,N型漂移区与P埋层之间的反偏PN结将承担器件的绝大部分纵向压降。采用2维数值仿真工具Silvaco TCAD对BPL SOI LDMOS进行虚拟制造和器件仿真,结果表明该结构采用适当的参数既能实现1 280 V的耐压,将BOL减薄到几百纳米以下又可以改善其热特性。展开更多
A novel n-buried-pSOI sandwiched structure for an RF power LDMOS is proposed. The output characteristics of the RF power LDMOS are greatly affected by the drain-substrate parasitic capacitance. The output characterist...A novel n-buried-pSOI sandwiched structure for an RF power LDMOS is proposed. The output characteristics of the RF power LDMOS are greatly affected by the drain-substrate parasitic capacitance. The output characteristics become better as the drain-substrate parasitic capacitance decreases. Results show that the drain-substrate capacitance of the n- buried-pSOI sandwiched LDMOS is 46.6% less than that of the normal LDMOS,and 11.5% less than that of the n-buried- pSOI LDMOS,respectively. At l dB compression point,its output power is 188% higher than that of the normal LDMOS, and 10.6% higher than that of the n-buried-pSOI LDMOS, respectively. The power-added efficiency of the proposed structure is 38.3%. The breakdown voltage of the proposed structure is 11% more than that of the normal LDMOS.展开更多
基金Innovative Scientific Research Project for Graduate Student of Zhejiang Province(YK2010059)Project supported by the Science and Technology development plan of Zhejiang Province(2006AA09Z228)
文摘为了在薄埋氧层SOI衬底上实现超高耐压LDMOS铺平道路,提出了一种具有P埋层(BPL)的薄埋氧层SOI LDMOS结构,耐压1200V以上。该BPL SOI LDMOS在传统SOI LDMOS的埋氧层和N型漂移区之间引入了一个P型埋层。当器件正向截止时,N型漂移区与P埋层之间的反偏PN结将承担器件的绝大部分纵向压降。采用2维数值仿真工具Silvaco TCAD对BPL SOI LDMOS进行虚拟制造和器件仿真,结果表明该结构采用适当的参数既能实现1 280 V的耐压,将BOL减薄到几百纳米以下又可以改善其热特性。
文摘A novel n-buried-pSOI sandwiched structure for an RF power LDMOS is proposed. The output characteristics of the RF power LDMOS are greatly affected by the drain-substrate parasitic capacitance. The output characteristics become better as the drain-substrate parasitic capacitance decreases. Results show that the drain-substrate capacitance of the n- buried-pSOI sandwiched LDMOS is 46.6% less than that of the normal LDMOS,and 11.5% less than that of the n-buried- pSOI LDMOS,respectively. At l dB compression point,its output power is 188% higher than that of the normal LDMOS, and 10.6% higher than that of the n-buried-pSOI LDMOS, respectively. The power-added efficiency of the proposed structure is 38.3%. The breakdown voltage of the proposed structure is 11% more than that of the normal LDMOS.
