针对超声波气体流量计接收信号幅度动态变化范围大的问题,提出了一种数控AGC电路,增益控制范围-14-86 d B,输出信号幅度范围500-1 000 m V,采样速率50 MSPS,数据存储容量2 MB。经过试验验证,200 k Hz的超声波收发信号在距离20-900 mm条...针对超声波气体流量计接收信号幅度动态变化范围大的问题,提出了一种数控AGC电路,增益控制范围-14-86 d B,输出信号幅度范围500-1 000 m V,采样速率50 MSPS,数据存储容量2 MB。经过试验验证,200 k Hz的超声波收发信号在距离20-900 mm条件下,增益在6-36 d B范围内自动调节实现了信号幅度范围500-1 000 m V输出,具有调控范围大、控制精度高、稳定性好的特点。展开更多
针对在测距过程中超声波的能量损耗和回波信号微弱的问题,在分析问题产生的基础上,利用可变增益放大器AD8338设计了超声波自动增益控制(AGC)接收补偿电路,动态范围达到80 d B。实验结果表明:该自动增益补偿电路结构简单,不需要额外的控...针对在测距过程中超声波的能量损耗和回波信号微弱的问题,在分析问题产生的基础上,利用可变增益放大器AD8338设计了超声波自动增益控制(AGC)接收补偿电路,动态范围达到80 d B。实验结果表明:该自动增益补偿电路结构简单,不需要额外的控制器件,可以使不同距离的超声波回波信号维持在合适的幅度范围内,有效地解决了回波信号衰减等问题,提高测距精度。展开更多
A differential automatic gain control （AGC） circuit is presented. The AGC architecture contains twostage variable gain amplifiers （VGAs） which are implemented with a Gilbert cell, a peak detector （PD）, a low pas...A differential automatic gain control （AGC） circuit is presented. The AGC architecture contains twostage variable gain amplifiers （VGAs） which are implemented with a Gilbert cell, a peak detector （PD）, a low pass filter, an operational amplifier, and two voltage to current （V-I） convertors. One stage VGA achieves 30 dB gain due to the use of active load. The AGC circuit is implemented in UMC 0.18-um single-poly six-metal CMOS process technology. Measurement results show that the final differential output swing of the 2nd stage VGA is about 0.9-Vpp; the total gain of the two VGAs can be varied linearly from -10 to 50 dB when the control voltage varies from 0.3 to 0.9 V. The final circuit （containing output buffers and a band-gap reference） consumes 37 mA from single 1.8 V voltage supply. For a 50 mV amplitude 60% modulation depth input AM signal it needs 100 us to stabilize the output. The frequency response of the circuit has almost a constant -3 dB bandwidth of 2.2 MHz. Its OIP3 result is at 19 dBm.展开更多
A CMOS variable gain amplifier（VGA） that adopts a novel exponential gain approximation is presented.No additional exponential gain control circuit is required in the proposed VGA used in a direct conversion receiver...A CMOS variable gain amplifier（VGA） that adopts a novel exponential gain approximation is presented.No additional exponential gain control circuit is required in the proposed VGA used in a direct conversion receiver.A wide gain control voltage from 0.4 to 1.8 V and a high linearity performance are achieved.The three-stage VGA with automatic gain control（AGC） and DC offset cancellation（DCOC） is fabricated in a 0.18-μm CMOS technology and shows a linear gain range of more than 58-dB with a linearity error less than ±1 dB.The 3-dB bandwidth is over 8 MHz at all gain settings.The measured input-referred third intercept point（IIP3） of the proposed VGA varies from-18.1 to 13.5 dBm,and the measured noise figure varies from 27 to 65 dB at a frequency of 1 MHz.The dynamic range of the closed-loop AGC exceeds 56 dB,where the output signal-to-noise-and-distortion ratio（SNDR） reaches 20 dB.The whole circuit,occupying 0.3 mm^2 of chip area,dissipates less than 3.7 mA from a 1.8-V supply.展开更多
This paper presents a wideband variable gain amplifier(VGA) featuring a decibel-linear gain control characteristic. The decibel-linear gain control function is realized using two VGA cells and a control signal convert...This paper presents a wideband variable gain amplifier(VGA) featuring a decibel-linear gain control characteristic. The decibel-linear gain control function is realized using two VGA cells and a control signal converter. The bandwidth is extended by using cascode architecture together with active inductive load. To achieve small parasitic and low area,direct current(DC) coupling is adopted in the circuit while a DC offset cancellation(DCOC) circuit is introduced to cancel the DC offset. Fabricated in a 0.18 μm complementary metal oxide semiconductor(CMOS) process, the chip occupies an area of 0.53 mm×0.48 mm(including pads) and draws a total current of 9 mA from a 1.8 V supply. The measurement results show that the gain of the VGA varies from-40 dB to 18 dB while the control voltage varies from 0 to 1.8 V, resulting in a total gain control range of 58 dB. The 3 dB bandwidth of the VGA is larger than 260 MHz at maximum gain.展开更多
This paper proposes a new structure to lower the power consumption of a variable gain amplifier（VGA） and keep the linearity of the VGA unchanged.The structure is used in a high rate amplitude-shift keying（ASK） bas...This paper proposes a new structure to lower the power consumption of a variable gain amplifier（VGA） and keep the linearity of the VGA unchanged.The structure is used in a high rate amplitude-shift keying（ASK） based IF-stage.It includes an automatic gain control（AGC） loop and ASK demodulator.The AGC mainly consists of sixstage VGAs.The IF-stage is realized in 0.18μm CMOS technology.The measurement results show that the power consumption of the whole system is very low.The system consumes 730μA while operating at 1.8 V.The minimum ASK signal the system could detect is 0.7 mV（peak to peak amplitude）.展开更多
文摘针对超声波气体流量计接收信号幅度动态变化范围大的问题,提出了一种数控AGC电路,增益控制范围-14-86 d B,输出信号幅度范围500-1 000 m V,采样速率50 MSPS,数据存储容量2 MB。经过试验验证,200 k Hz的超声波收发信号在距离20-900 mm条件下,增益在6-36 d B范围内自动调节实现了信号幅度范围500-1 000 m V输出,具有调控范围大、控制精度高、稳定性好的特点。
文摘针对在测距过程中超声波的能量损耗和回波信号微弱的问题,在分析问题产生的基础上,利用可变增益放大器AD8338设计了超声波自动增益控制(AGC)接收补偿电路,动态范围达到80 d B。实验结果表明:该自动增益补偿电路结构简单,不需要额外的控制器件,可以使不同距离的超声波回波信号维持在合适的幅度范围内,有效地解决了回波信号衰减等问题,提高测距精度。
基金Project supported by the National High Technology Research and Development Program of China(No.2008AA04A 102)
文摘A differential automatic gain control （AGC） circuit is presented. The AGC architecture contains twostage variable gain amplifiers （VGAs） which are implemented with a Gilbert cell, a peak detector （PD）, a low pass filter, an operational amplifier, and two voltage to current （V-I） convertors. One stage VGA achieves 30 dB gain due to the use of active load. The AGC circuit is implemented in UMC 0.18-um single-poly six-metal CMOS process technology. Measurement results show that the final differential output swing of the 2nd stage VGA is about 0.9-Vpp; the total gain of the two VGAs can be varied linearly from -10 to 50 dB when the control voltage varies from 0.3 to 0.9 V. The final circuit （containing output buffers and a band-gap reference） consumes 37 mA from single 1.8 V voltage supply. For a 50 mV amplitude 60% modulation depth input AM signal it needs 100 us to stabilize the output. The frequency response of the circuit has almost a constant -3 dB bandwidth of 2.2 MHz. Its OIP3 result is at 19 dBm.
文摘A CMOS variable gain amplifier（VGA） that adopts a novel exponential gain approximation is presented.No additional exponential gain control circuit is required in the proposed VGA used in a direct conversion receiver.A wide gain control voltage from 0.4 to 1.8 V and a high linearity performance are achieved.The three-stage VGA with automatic gain control（AGC） and DC offset cancellation（DCOC） is fabricated in a 0.18-μm CMOS technology and shows a linear gain range of more than 58-dB with a linearity error less than ±1 dB.The 3-dB bandwidth is over 8 MHz at all gain settings.The measured input-referred third intercept point（IIP3） of the proposed VGA varies from-18.1 to 13.5 dBm,and the measured noise figure varies from 27 to 65 dB at a frequency of 1 MHz.The dynamic range of the closed-loop AGC exceeds 56 dB,where the output signal-to-noise-and-distortion ratio（SNDR） reaches 20 dB.The whole circuit,occupying 0.3 mm^2 of chip area,dissipates less than 3.7 mA from a 1.8-V supply.
基金supported by the Natural Science Foundation and Special Major Basic Research Program of Hebei Province(18960202D)
文摘This paper presents a wideband variable gain amplifier(VGA) featuring a decibel-linear gain control characteristic. The decibel-linear gain control function is realized using two VGA cells and a control signal converter. The bandwidth is extended by using cascode architecture together with active inductive load. To achieve small parasitic and low area,direct current(DC) coupling is adopted in the circuit while a DC offset cancellation(DCOC) circuit is introduced to cancel the DC offset. Fabricated in a 0.18 μm complementary metal oxide semiconductor(CMOS) process, the chip occupies an area of 0.53 mm×0.48 mm(including pads) and draws a total current of 9 mA from a 1.8 V supply. The measurement results show that the gain of the VGA varies from-40 dB to 18 dB while the control voltage varies from 0 to 1.8 V, resulting in a total gain control range of 58 dB. The 3 dB bandwidth of the VGA is larger than 260 MHz at maximum gain.
基金supported by the National High-Tech Research and Development Program of China(Nos.2008AA010703,2009AA011606)the National Natural Science Foundation of China(No.60976023)
文摘This paper proposes a new structure to lower the power consumption of a variable gain amplifier（VGA） and keep the linearity of the VGA unchanged.The structure is used in a high rate amplitude-shift keying（ASK） based IF-stage.It includes an automatic gain control（AGC） loop and ASK demodulator.The AGC mainly consists of sixstage VGAs.The IF-stage is realized in 0.18μm CMOS technology.The measurement results show that the power consumption of the whole system is very low.The system consumes 730μA while operating at 1.8 V.The minimum ASK signal the system could detect is 0.7 mV（peak to peak amplitude）.
