Protein folding is regarded as a quantum transition between the torsion states of a polypeptide chain.According to the quantum theory of conformational dynamics,we propose the dynamical contact order(DCO) defined as a...Protein folding is regarded as a quantum transition between the torsion states of a polypeptide chain.According to the quantum theory of conformational dynamics,we propose the dynamical contact order(DCO) defined as a characteristic of the contact described by the moment of inertia and the torsion potential energy of the polypeptide chain between contact residues.Conse-quently,the protein folding rate can be quantitatively studied from the point of view of dynamics.By comparing theoretical calculations and experimental data on the folding rate of 80 proteins,we successfully validate the view that protein folding is a quantum conformational transition.We conclude that(i) a correlation between the protein folding rate and the contact inertial moment exists;(ii) multi-state protein folding can be regarded as a quantum conformational transition similar to that of two-state proteins but with an intermediate delay.We have estimated the order of magnitude of the time delay;(iii) folding can be classified into two types,exergonic and endergonic.Most of the two-state proteins with higher folding rate are exergonic and most of the multi-state proteins with low folding rate are endergonic.The folding speed limit is determined by exergonic folding.展开更多
High spin states of 84Sr were populated through the reaction 70Zn(18O,4n)84Sr at 75 MeV beam energy.Measurement of excitation function,γ-γ coincidences,directional correlation from oriented state (DCO) ratios and γ...High spin states of 84Sr were populated through the reaction 70Zn(18O,4n)84Sr at 75 MeV beam energy.Measurement of excitation function,γ-γ coincidences,directional correlation from oriented state (DCO) ratios and γ-transition intensities were performed using eight anticompton HPGe detectors and one planar HPGe detector.Based on the measured results,a new level scheme of 84Sr was established in which 12 new states and nearly 30 new γ-transitions were identified in the present work.The positive-parity states of the new level scheme were compared with the results from calculations in the framework of the projected shell model (PSM).One negative-parity band was extended to spin Iπ=19-and it can be found that in the high spin states,the γ-transition energies show the nature of signature staggering.The negative-parity band levels are in good agreement with deformed configuration-mixing shell model (DCM) calculations.展开更多
目的探讨内镜逆行胰胆管造影(ERCP)及经皮肝穿刺胆道引流(PTCD)在急诊抢救急性梗阻性化脓性胆管炎(AOSC)患者生命,解决胆道梗阻及感染效果选择。方法笔者回顾性分析广西医科大学第一附属医院(2011-2013年)67例确诊为因胆总管下段结石梗...目的探讨内镜逆行胰胆管造影(ERCP)及经皮肝穿刺胆道引流(PTCD)在急诊抢救急性梗阻性化脓性胆管炎(AOSC)患者生命,解决胆道梗阻及感染效果选择。方法笔者回顾性分析广西医科大学第一附属医院(2011-2013年)67例确诊为因胆总管下段结石梗阻诱发急性重症胆管炎患者,两组患者术前基础情况差异无统计学意义,急诊分别采用ERCP、PTCD治疗,进行术中麻醉、手术创伤及术后恢复情况比较。结果 PTCD手术耐受性更好,引流效果更确切,ERCP则在微创的前提下提供了解决结石梗阻的方案。结论具体病例应按照损伤控制性手术(Damage control op-eration,DCO)原则与理念进行分析与选择。展开更多
针对E1数据的时钟数据恢复问题,设计一种基于小数分频且有环路滤波功能的数控振荡器(DigitallyControlled Oscillator,DCO),给出一种新的全数字锁相环(All Digital Phase-Locked Loop,ADPLL)实现方案,将数字环路滤波器(Digital Loop Fil...针对E1数据的时钟数据恢复问题,设计一种基于小数分频且有环路滤波功能的数控振荡器(DigitallyControlled Oscillator,DCO),给出一种新的全数字锁相环(All Digital Phase-Locked Loop,ADPLL)实现方案,将数字环路滤波器(Digital Loop Filter,DLF)和DCO集成到一个模块,从而实现一种E1时钟数据恢复(Clock Data Re-covery,CDR)电路。经过对比可知,新方案比传统ADPLL实现方案的电路集成度更高。理论分析显示,新方案电路性能可靠。展开更多
全数字锁相环(ADPLL)是现代通信系统和计算机接口电路中的关键部件.数控振荡器(DCO)是ADPLL的核心模块电路,决定了ADPLL的整体性能.对比提出了一种基于标准单元技术的数控振荡器,采用粗调级与精调级级联的结构.该结构中的阶梯型粗调级,...全数字锁相环(ADPLL)是现代通信系统和计算机接口电路中的关键部件.数控振荡器(DCO)是ADPLL的核心模块电路,决定了ADPLL的整体性能.对比提出了一种基于标准单元技术的数控振荡器,采用粗调级与精调级级联的结构.该结构中的阶梯型粗调级,能够展宽频率调节范围、降低功耗;精调级采用插值电路,能够将粗调单元的延时步长细化,从而得到更高精度的输出时钟.基于Tower Jazz 0.18μm CMOS工艺,对该数控振荡器进行了仿真验证,显示该电路能够工作在不同的工艺角、温度下,输出200 MHz的时钟信号,频率分辨率为10ps,功耗为1.2mW,而且线性度高.该数控振荡器完全基于标准单元设计,通过数字流程实现,具有更高的可移植性,缩短了设计周期.展开更多
This paper presents a low-power small-area digitally controlled oscillator （DCO） using an inverters interlaced cascaded delay cell （IICDC）. It uses a coarse-fine architecture with binary-weighted delay stages for ...This paper presents a low-power small-area digitally controlled oscillator （DCO） using an inverters interlaced cascaded delay cell （IICDC）. It uses a coarse-fine architecture with binary-weighted delay stages for the delay range and resolution. The coarse-tuning stage of the DCO uses IICDC, which is power and area efficient with low phase noise, as compared with conventional delay cells. The ADPLL with a DCO is fabricated in the UMC 180-nm CMOS process with an active area of 0.071 mm2. The output frequency range is 140-600 MHz at the power supply of 1.8 V. The power consumption is 2.34 mW@ a 200 MHz output.展开更多
In this paper, a novel hybrid digital-controlled oscillator（DCO） is proposed, which is used to improve the accuracy of the all-digital clock generator without reference source. The DCO with hybrid architecture consi...In this paper, a novel hybrid digital-controlled oscillator（DCO） is proposed, which is used to improve the accuracy of the all-digital clock generator without reference source. The DCO with hybrid architecture consists of two parts： DCO_high and DCO_low. The DCO_high decides the coarse output frequency of DCO, and adopts the cascade structure to decrease the area. The DCO_low adopts the chain structure with three-state buffer, and decides the fine output frequency of DCO. Compared with traditional cascade DCO, the proposed hybrid DCO features higher precision with less inherent delay. Therefore the clock generator can tolerate process, voltage and temperature（PVT） variation and meet the needs of different conditions. The DCO is designed in SMIC 180 nm CMOS process with 0.021 mm^2 chip area. The output frequency is adjusted from 15–120 MHz. The frequency error is less than 0.83% at 25 MHz with 1.6–1.8 V supply voltage and 0–80℃ temperature variations in TT, FF,SS corners.展开更多
The level structure of ^19Opt has been studied experimentally using the ^176yb （^18O, 4n） reaction at beam energies of 88 and 95 MeV. γ-γ-t coincidence measurements were carried out. Based on the analysis of T-T ...The level structure of ^19Opt has been studied experimentally using the ^176yb （^18O, 4n） reaction at beam energies of 88 and 95 MeV. γ-γ-t coincidence measurements were carried out. Based on the analysis of T-T coincidence relationships, the level scheme of ^190Pt is extended to high-spin states. A new structure built on the 3413.6 keV 14＋ state has been observed, and the ＂vi13/2^-2 vh9/2^-1 vj （j = P3/2 or f5/2） configuration is tentatively assigned to it.展开更多
A monolithic low-power and low-phase-noise digitally controlled oscillator （DCO） based on a symmetric spiral inductor with center-tap and novel capacitor bank was implemented in a 0.18 μm CMOS process with six meta...A monolithic low-power and low-phase-noise digitally controlled oscillator （DCO） based on a symmetric spiral inductor with center-tap and novel capacitor bank was implemented in a 0.18 μm CMOS process with six metal layers. A third new way to change capacitance is proposed and implemented in this work. Results show that the phase noise at I MHz offset frequency is below -122.5 dBc/Hz while drawing a current of only 4.8 mA from a 1.8 V supply. Also, the DCO can work at low supply voltage conditions with a 1.6 V power supply and 4.1 mA supply current for the DCO＇s core circuit, achieving a phase-noise of-121.5 dBc/Hz at offset of 1 MHz. It demonstrates that the supply pushing of DCO is less than 10 MHz/V.展开更多
基金supported by the Distinguished Scientist Award of Inner Mongolia Autonomous Region(2008)a Major Project Fund of Inner Mongolia University of Technology(Grant No.ZD200917)a Project Fund of Inner Mongolia Natural Science(Grant No.2010BS0104)
文摘Protein folding is regarded as a quantum transition between the torsion states of a polypeptide chain.According to the quantum theory of conformational dynamics,we propose the dynamical contact order(DCO) defined as a characteristic of the contact described by the moment of inertia and the torsion potential energy of the polypeptide chain between contact residues.Conse-quently,the protein folding rate can be quantitatively studied from the point of view of dynamics.By comparing theoretical calculations and experimental data on the folding rate of 80 proteins,we successfully validate the view that protein folding is a quantum conformational transition.We conclude that(i) a correlation between the protein folding rate and the contact inertial moment exists;(ii) multi-state protein folding can be regarded as a quantum conformational transition similar to that of two-state proteins but with an intermediate delay.We have estimated the order of magnitude of the time delay;(iii) folding can be classified into two types,exergonic and endergonic.Most of the two-state proteins with higher folding rate are exergonic and most of the multi-state proteins with low folding rate are endergonic.The folding speed limit is determined by exergonic folding.
基金supported by the Major State Basic Research Development Program in China (Grant No. 2007CB815003)the National Natural Science Foundation of China (Grant Nos. 11065001, 10547140, 10525520,60476043,10675170,10475002 and 10775064)+4 种基金the U.S. National Science Foundation (Grant No. 0500291)the Southeastern Universities Research Association,the Natural Science Foundation of Jiangxi Province (Grant Nos. 0612003 and 2007GZW0476)the LSU - LNNU Joint Research Program (Grant No. 9961)the Foundation of the Education Department of Jiangxi Province (Grant No. [2007]235)the Liaoning Education Department Fund (Grant No. 20060464)
文摘High spin states of 84Sr were populated through the reaction 70Zn(18O,4n)84Sr at 75 MeV beam energy.Measurement of excitation function,γ-γ coincidences,directional correlation from oriented state (DCO) ratios and γ-transition intensities were performed using eight anticompton HPGe detectors and one planar HPGe detector.Based on the measured results,a new level scheme of 84Sr was established in which 12 new states and nearly 30 new γ-transitions were identified in the present work.The positive-parity states of the new level scheme were compared with the results from calculations in the framework of the projected shell model (PSM).One negative-parity band was extended to spin Iπ=19-and it can be found that in the high spin states,the γ-transition energies show the nature of signature staggering.The negative-parity band levels are in good agreement with deformed configuration-mixing shell model (DCM) calculations.
文摘目的探讨内镜逆行胰胆管造影(ERCP)及经皮肝穿刺胆道引流(PTCD)在急诊抢救急性梗阻性化脓性胆管炎(AOSC)患者生命,解决胆道梗阻及感染效果选择。方法笔者回顾性分析广西医科大学第一附属医院(2011-2013年)67例确诊为因胆总管下段结石梗阻诱发急性重症胆管炎患者,两组患者术前基础情况差异无统计学意义,急诊分别采用ERCP、PTCD治疗,进行术中麻醉、手术创伤及术后恢复情况比较。结果 PTCD手术耐受性更好,引流效果更确切,ERCP则在微创的前提下提供了解决结石梗阻的方案。结论具体病例应按照损伤控制性手术(Damage control op-eration,DCO)原则与理念进行分析与选择。
文摘针对E1数据的时钟数据恢复问题,设计一种基于小数分频且有环路滤波功能的数控振荡器(DigitallyControlled Oscillator,DCO),给出一种新的全数字锁相环(All Digital Phase-Locked Loop,ADPLL)实现方案,将数字环路滤波器(Digital Loop Filter,DLF)和DCO集成到一个模块,从而实现一种E1时钟数据恢复(Clock Data Re-covery,CDR)电路。经过对比可知,新方案比传统ADPLL实现方案的电路集成度更高。理论分析显示,新方案电路性能可靠。
文摘全数字锁相环(ADPLL)是现代通信系统和计算机接口电路中的关键部件.数控振荡器(DCO)是ADPLL的核心模块电路,决定了ADPLL的整体性能.对比提出了一种基于标准单元技术的数控振荡器,采用粗调级与精调级级联的结构.该结构中的阶梯型粗调级,能够展宽频率调节范围、降低功耗;精调级采用插值电路,能够将粗调单元的延时步长细化,从而得到更高精度的输出时钟.基于Tower Jazz 0.18μm CMOS工艺,对该数控振荡器进行了仿真验证,显示该电路能够工作在不同的工艺角、温度下,输出200 MHz的时钟信号,频率分辨率为10ps,功耗为1.2mW,而且线性度高.该数控振荡器完全基于标准单元设计,通过数字流程实现,具有更高的可移植性,缩短了设计周期.
文摘This paper presents a low-power small-area digitally controlled oscillator （DCO） using an inverters interlaced cascaded delay cell （IICDC）. It uses a coarse-fine architecture with binary-weighted delay stages for the delay range and resolution. The coarse-tuning stage of the DCO uses IICDC, which is power and area efficient with low phase noise, as compared with conventional delay cells. The ADPLL with a DCO is fabricated in the UMC 180-nm CMOS process with an active area of 0.071 mm2. The output frequency range is 140-600 MHz at the power supply of 1.8 V. The power consumption is 2.34 mW@ a 200 MHz output.
基金supported by the National Natural Science Foundation of China(Nos.61306025,61474135)
文摘In this paper, a novel hybrid digital-controlled oscillator（DCO） is proposed, which is used to improve the accuracy of the all-digital clock generator without reference source. The DCO with hybrid architecture consists of two parts： DCO_high and DCO_low. The DCO_high decides the coarse output frequency of DCO, and adopts the cascade structure to decrease the area. The DCO_low adopts the chain structure with three-state buffer, and decides the fine output frequency of DCO. Compared with traditional cascade DCO, the proposed hybrid DCO features higher precision with less inherent delay. Therefore the clock generator can tolerate process, voltage and temperature（PVT） variation and meet the needs of different conditions. The DCO is designed in SMIC 180 nm CMOS process with 0.021 mm^2 chip area. The output frequency is adjusted from 15–120 MHz. The frequency error is less than 0.83% at 25 MHz with 1.6–1.8 V supply voltage and 0–80℃ temperature variations in TT, FF,SS corners.
基金Supported by National Natural Science Foundation of China(10505025,10475097)Chinese Academy of Sciences
文摘The level structure of ^19Opt has been studied experimentally using the ^176yb （^18O, 4n） reaction at beam energies of 88 and 95 MeV. γ-γ-t coincidence measurements were carried out. Based on the analysis of T-T coincidence relationships, the level scheme of ^190Pt is extended to high-spin states. A new structure built on the 3413.6 keV 14＋ state has been observed, and the ＂vi13/2^-2 vh9/2^-1 vj （j = P3/2 or f5/2） configuration is tentatively assigned to it.
文摘A monolithic low-power and low-phase-noise digitally controlled oscillator （DCO） based on a symmetric spiral inductor with center-tap and novel capacitor bank was implemented in a 0.18 μm CMOS process with six metal layers. A third new way to change capacitance is proposed and implemented in this work. Results show that the phase noise at I MHz offset frequency is below -122.5 dBc/Hz while drawing a current of only 4.8 mA from a 1.8 V supply. Also, the DCO can work at low supply voltage conditions with a 1.6 V power supply and 4.1 mA supply current for the DCO＇s core circuit, achieving a phase-noise of-121.5 dBc/Hz at offset of 1 MHz. It demonstrates that the supply pushing of DCO is less than 10 MHz/V.
