摘要
介绍一种针对高性能的无线数字通讯系统的SoC设计方法。该方法对SoC设计要求高效合理地进行软硬件划分,将划分后的硬件子模块映像到一个高效的多通道总线拓扑结构中以及为不同通道的本地总线设计一个高效自适应的访问协议。同时提出一种全新的专门针对SoC设计、基于总线监控的高效实用的可测性设计方案。以这些设计方法为指导,文章为IEEE 802.11无线局域网的介质访问层和基带控制层的SoC芯片设计提出了一个系统参考解决方案。
In this paper, an efficient methodology for high-performance wireless digitalcommunication is described. This methodology optimally partitions the requirement of SoC designinto software and hardware,optically maps the hardware components into a high-performance multi-channel topology, and design the adaptive bus access protocol for each channel. Further more, anovel build-in self-test mechanism which is based on bus access monitoring and much more impactfulfor large scale SoC design is presented in this paper. Based on these methodologies, a SoC design ofIEEE 802.11 WLAN's MAC and Baseband controller is presented.
出处
《半导体技术》
CAS
CSCD
北大核心
2003年第2期24-28,共5页
Semiconductor Technology
