摘要
纳米银无压烧结技术作为一种新型封装互连技术,凭借烧结银层的优异性能,逐步在第三代半导体器件的封装互连领域应用和推广。目前,无压烧结银技术只适用于芯片级别小面积互连领域,在基板级别大面积互连领域存在若干瓶颈,有待深入研究。文章详细介绍了现有的小面积无压烧结纳米银互连工艺以及可靠性,在此基础上,针对大面积无压烧结银工艺所面临的瓶颈,引入一种双层印刷焊膏(双印法)的低温无压烧结工艺。采用超声扫描成像技术对烧结质量进行表征,获得双印法中使用的两层银焊膏的成分优化配比并对其烧结机理进行分析,为纳米银基板级大面积无压烧结互连提供一种可行方案。最后,展望了基板级别大面积无压烧结银工艺的发展趋势和应用前景。
As a state-of-the-art interconnect technology the nano-silver pressureless sintering technology is gradually being applied and promoted in packaging for third generation semiconductor devices due to the excellent performance of sintered-silver bond-line.At present,chip-level small-area bonding can be easily achieved by employing pressureless sintered-silver technology.There are several bottlenecks that still need to be dealt with to achieve substrate-level large-area bonding plates by pressureless sintering of nano-silver.In this paper,the existing small-area nano-silver pressureless sintering technology and the reliability of pressureless sintered-silver bond-line are detailed.On this basis,a large-area pressureless sintering process with a double-layer silver paste printing(double-printing)method is introduced to deal with the existing bottlenecks.The bonding quality is characterized by scanning acoustic microscope.The solid loading of silver paste is optimized to obtain better bonding quality,and the sintering mechanism is analyzed in detail.The introduced nano-silver sintering process provides a feasible scheme for substrate-level large-area pressureless bonding plates.Finally,the development trends and application prospects of substrate-level nano-silver pressureless sintering process are foreseen.
作者
吴成金
谭沿松
高丽兰
WU Chengjin;TAN Yansong;GAO Lilan(Tianjin Key Laboratory for Advanced Mechatronic System Design and Intelligent Control,Tianjin University of Technology,Tianjin 300384,China;National Demonstration Center for Experimental Mechanical and Electrical Engineering Education,Tianjin University of Technology,Tianjin 300384,China;CARE Measurement&Control System(Tianjin)Company,Tianjin 300000,China)
出处
《天津理工大学学报》
2024年第2期41-48,共8页
Journal of Tianjin University of Technology
基金
国家自然青年科学基金(52105158)。
关键词
电子封装
纳米银
无压烧结
芯片级别
基板级别
electronic packaging
nano-silver
pressureless sintering
chip-level
substrate-level
