摘要
为了使主动网络测量探针国产化、小型化,通过分析目前CAIDA主推的最新主动探测终端工具群岛结构(Archipelago Measurement Infra-Structure,Ark)的硬件参数,并结合现有国产化裸芯片,设计了一种基于微系统技术的探针用主控系统级封装(System in Package,SiP)芯片。该探针主控SiP采用国产处理器搭配现场可编程门阵列(Field Programmable Gate Array,FGPA)的架构,集成双倍数据速率(Double Data Rate,DDR)内存颗粒和Flash等裸芯片,并选配了国产网络物理层芯片。设计完成的SiP芯片总体尺寸仅为30 mm×30 mm,最高主频为1 GHz,内存为2 GB,网口扩展为千兆。采用该探针芯片的系统从芯片选型到软件实现均采用全国产化设计,应用于国内网络测量场合时安全、保密性更高。
In order to localize and miniaturize the active network measuring device,the hardware parameters of the latest active detection terminal tool archipelago measurement infra-structure(Ark)promoted by CAIDA is analyzed.Using domestic dies,a system in package(SiP)chip for probe based on microsystem technology is proposed,in which,domestic processor,field programmable gate array(FGPA),double data rate(DDR)memory,flash chips and Ethernet physical layer chip are integrated.All of the chips are intergrated in the size of30 mm×30 mm.The frequency of the SiP is 1 GHz,the memory is 2 GB,and the network port speed is up to1000M.The chips and software design are fully domestic,with higher security and confidentiality when applied to domestic network measurement.
作者
毛臻
张春平
潘福跃
顾林
MAO Zhen;ZHANG Chunping;PAN Fuyue;GU Lin(China Key System&Integrated Circuit Co.,Ltd.,Wuxi 214072,China)
出处
《电子与封装》
2022年第4期77-82,共6页
Electronics & Packaging
基金
江苏省重点研发计划(BE2021003)。
