摘要
以自主研制的硅微谐振式加速度计(MSRA)为研究对象,针对其驱动电路的带宽测试,设计一种基于锁相环解调电路的带宽测试方案。针对锁相环驱动电路的相位传递函数建立SIMULINK仿真模型,并对闭环回路模型进行分析。在锁相环的输入端口加载由现场可编程门阵列(FPGA)产生的激励信号,等效为外界加速度频率变化下的锁相环输入信号,由基于锁相环的解调电路读出加速度计驱动电路的输出幅值,该带宽测试模型与MSRA实际测试情况一致。实验结果表明:MSRA锁相环驱动电路的实测+3 d B的带宽值为210 Hz,与模型仿真得到的216 Hz基本吻合。该测试方法具有精度高、易实施、成本低等特点,可满足锁相环驱动电路的带宽测试需求。
Taking the independently developed micro-machined silicon resonant accelerometer(MSRA)as research object,a bandwidth test scheme based on phase locked loop(PLL)demodulation circuit is designed for the bandwidth test of its drive circuit.Firstly,SIMULINK simulation model is established for the phase transfer function of the PLL driving circuit,and the closed-loop model is analyzed.It can be concluded that the excitation signal generated by field programmable gate array(FPGA)is loaded on the input port of the PLL,which is equivalent to the input signal of the PLL under the change of external acceleration frequency,and the output amplitude of the driver circuit of the accelerometer is read out by the demodulation circuit based on the PLL.This bandwidth test model is consistent with the actual test situation of MSRA.Experimental results show that the measured bandwidth of+3 d B of MSRA PLL driver circuit is 210 Hz,which is basically the same as the 216 Hz obtained by the model simulation.This test method has the characteristics of high precision,easy implementation and low cost,and can meet the bandwidth test requirements of the PLL driving circuit.
作者
范书聪
张基强
黄丽斌
李宏生
丁徐锴
FAN Shucong;ZHANG Jiqiang;HUANG Libin;LI Hongsheng;DING Xukai(School of Instrument Science and Engineering,Southeast University,Nanjing 210096,China;Key Laboratory of Micro-Inertial Instrument and Advanced Navigation Technology of Ministry of Education,Nanjing 210096,China)
出处
《传感器与微系统》
CSCD
2020年第8期20-22,共3页
Transducer and Microsystem Technologies
关键词
硅微谐振式加速度计
电路带宽
激励信号
锁相环
解调
micro-machined silicon resonant accelerometer(MSRA)
circuit bandwidth
excitation signal
phase-locked loop
demodulation
