摘要
介绍了一种具有新型电容失配校准算法的12位全差分逐次逼近型模数转换器(SAR ADC)。该校准算法基于比较器的亚稳态实现,同时利用统计的方法来计算电容的失配量。为了提高亚稳态检测精度并避免“假亚稳态”的问题,在该ADC中使用一种新的亚稳态检测电路,进一步提高了校准精度并优化了时序控制序列。该SAR ADC采用40 nm CMOS工艺实现验证。后仿真结果显示,与不带校准的相比,该算法可以使ADC的有效位数提高1.52 bit,在130 MSample/s的采样率下达到11.71 bit。该ADC的总功率为9.27 mW,面积为0.131 mm2,品质因数(FoM)为17.4 fJ/step。
A fully differential 12-bit SAR ADC with a novel capacitor mismatch calibration is presented.The calibration calculates the capacitor mismatch via the metastability of the comparator and statistical method.In order to increase the detection accuracy and avoid"fake metastability"problem,we design a novel metastability detection circuit,which can overcome this problem and improve both calibration accuracy and the timing control sequences.The SAR ADC is implemented in a 40 nm CMOS process.The post-simulation shows that the ENOB has been improved by 1.52 bit to achieve 11.71 bit at 130 MSample/s sampling rate using our proposed calibration compared to that w/o calibration.The ADC's total power is 9.27 mW with an area of 0.131 mm2,and the figure of merit(FoM)reaches to 17.4 fJ/step.
作者
曹文臻
唐鹤
CAO Wenzhen;TANG He(University of Electronic Science and Technology of China,Chengdu 610054,China;Institute of Electronic and Information Engineering of UESTC in Guangdong,Dongguan 523808,China)
出处
《电子与封装》
2020年第7期27-32,共6页
Electronics & Packaging
基金
广东省重点领域研发计划项目(2019B010135001)。
