摘要
模拟电路的设计重用是提高模拟与混合信号集成电路设计效率的重要途径.本文提出了一种基于gm/Id参数的不同工艺之间同一结构电路的设计移植方法.方法的基本思想是保持移植前后电路中部分关键MOS管的gm/Id参数,从而使移植后电路的性能也基本保持不变.介绍了基于BSIM等模型的gm/Id匹配及移植电路参数确定方法.给出了一个Miller补偿两级运放及一个折叠共源共栅运放从0.35μm工艺到0.18μm、0.13μm、90nm工艺的移植仿真结果.与现有方法相比,本文方法可以更小的计算代价,得到性能基本相同、但功耗与面积缩减的电路.
Design reuse is an important means to increase the productivity of analog and mixed-siganl IC designs.A gm/Id based resizing methodology for CMOS OpAmp’s is proposed in this paper.The basic idea is to preserve the gm/Id parameters of some crucial transistors in the circuit with the aim of the approximate performance preservation of the resized circuit.The method to accurately match the gm/Id parameters based on the BSIM like model between the resized and the original circuit is presented.The resizing experiments of a two-stage Miller compensated OpAmp and a folded cascode OpAmp for the process migration from a 0.35μm CMOS technology to a 0.18μm,0.13μm,90nm one have been performed to validate the proposed method.The simulation results show that the method generates the resized circuits with almost the same performance but reduced power and area consumption at a lower computational cost compared with the existing approaches.
作者
于浩
郭裕顺
李康
YU Hao;GUO Yu-shun;LI Kang(School of Electronics and Information Engineering,Hangzhou Dianzi University,Zhejiang,Hangzhou 310018,China)
出处
《电子学报》
EI
CAS
CSCD
北大核心
2019年第8期1626-1632,共7页
Acta Electronica Sinica
