摘要
具有高介电常数的栅绝缘层材料存在某种极化及耦合作用,使得ZnO-TFTs具有高的界面费米能级钉扎效应、大的电容耦合效应和低的载流子迁移率.为了解决这些问题,本文提出了一种使用SiO 2 修饰的Bi 1.5 Zn 1.0 Nb 1.5 O 7 作为栅绝缘层的ZnO-TFTs结构,分析了SiO 2 修饰对栅绝缘层和ZnO-TFTs性能的影响.结果表明,使用SiO 2 修饰后,栅绝缘层和ZnO-TFTs的性能得到显著提高,使得ZnO-TFTs在下一代显示领域中具有非常广泛的应用前景.栅绝缘层的漏电流密度从4.5×10^-5 A/cm^2 降低到7.7×10^-7 A/cm^2 ,粗糙度从4.52nm降低到3.74nm,ZnO-TFTs的亚阈值摆幅从10V/dec降低到2.81V/dec,界面态密度从8×10^13 cm^-2 降低到9×10 12 cm^-2 ,迁移率从0.001cm^2 /(V·s)升高到0.159cm^2 /(V·s).
The gate insulator material with high dielectric constant has some polarization and coupling effect,which makes ZnO-TFTs have high interface Fermi level pinning effect,large capacitive coupling effect and low carrier mobility.To solve these problems,in this paper,a kind of ZnO-TFTs structure using SiO 2 modification of Bi 1.5 Zn 1.0 Nb 1.5 O 7 as gate insulator was proposed.The effect of SiO 2 modification on the performance of gate insulator and ZnO-TFTs was systematically investigated.The results showed that the properties of gate insulators and ZnO-TFTs were significantly improved after SiO 2 modification,which makes ZnO-TFTs have a very wide application prospect in the next generation display field.The leakage current density and roughness of gate insulators decreased from 4.5×10^-5 A/cm^2 to 7.7×10^-7 A/cm^2 and from 4.52nm to 3.74nm,respectively.The sub-threshold swing and interface state density of ZnO-TFTs decreased from 10V/dec.to 2.81V/dec.and from 8×10^13 cm^-2 to 9×10^12 cm^-2 ,respectively.The mobility of ZnO-TFTs increased from 0.001cm^2 /(V·s) to 0.159cm^2 /(V·s).
作者
叶伟
崔立堃
常红梅
YE Wei;CUI Li-kun;CHANG Hong-mei(School of Mechanical Engineering,Shaanxi University of Technology,Hanzhong,Shaanxi 723001,China)
出处
《电子学报》
EI
CAS
CSCD
北大核心
2019年第6期1344-1351,共8页
Acta Electronica Sinica
基金
陕西省教育厅专项科学研究计划(No.17JK0144,No.18JK0151)
陕西省工业自动化重点实验室项目(No.09JS045)
陕西理工大学人才启动项目(No.SLGQD2017-19)
