摘要
LV/HV Twin-Well BCD[B]技术(2)能够实现MOS器件低压5 V与高压100~700 V (或更高)和双极型器件低压5 V与高压30~100 V兼容的BCD工艺。为了便于高低压器件兼容集成,采用源区为硼磷双扩散形成沟道的具有漂移区的偏置栅结构的HV LDMOS器件,亦同时形成HV双极型器件。改变漂移区的长度,宽度,结深度以及掺杂浓度等可以得到不同的高电压。采用芯片结构设计、工艺与制造技术,依该技术得到了芯片制程结构。
LV/HV Twin-Well BCD [B] technology(2)can realize BCD process compatible with low-voltage 5V and high-voltage 100~700 V(or higher)of MOS devices and lowvoltage 5V and high-voltage 30~100 V of bipolar devices.In order to facilitate the compatible integration of high and low voltage devices,HV LDMOS devices with bias gate structure with drift region and bipolar HV devices with double diffusions of boron and phosphorus in the source region are adopted.Different high voltage can be obtained by changing the length,width,junction depth and doping concentration of the drift region.The structure design,process and manufacturing technology of the chip are adopted,and the chip process structure is obtained by this technology.
作者
潘桂忠
PAN Guizhong(Shanghai Belling Co.Ltd,Shanghai 200233,China;The 771 Electronics Technique Institute of China Aerospace Science and TechnologyResearch Academy,Shaanxi 710600,China)
出处
《集成电路应用》
2019年第2期30-34,共5页
Application of IC
基金
上海市软件和集成电路产业发展专项基金(2009.090027)
